{"id":"https://openalex.org/W2422620391","doi":"https://doi.org/10.1109/ewdts.2015.7493149","title":"Overview study on fault modeling and test methodology development for FinFET-based memories","display_name":"Overview study on fault modeling and test methodology development for FinFET-based memories","publication_year":2015,"publication_date":"2015-09-01","ids":{"openalex":"https://openalex.org/W2422620391","doi":"https://doi.org/10.1109/ewdts.2015.7493149","mag":"2422620391"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts.2015.7493149","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2015.7493149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087036362","display_name":"Grigor Tshagharyan","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"G. Tshagharyan","raw_affiliation_strings":["Synopsys"],"affiliations":[{"raw_affiliation_string":"Synopsys","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041707514","display_name":"G. Harutyunyan","orcid":"https://orcid.org/0000-0002-9709-8336"},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"G. Harutyunyan","raw_affiliation_strings":["Synopsys"],"affiliations":[{"raw_affiliation_string":"Synopsys","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044147350","display_name":"S. Shoukourian","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"S. Shoukourian","raw_affiliation_strings":["Synopsys"],"affiliations":[{"raw_affiliation_string":"Synopsys","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108606295","display_name":"Y. Zorian","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Y. Zorian","raw_affiliation_strings":["Synopsys"],"affiliations":[{"raw_affiliation_string":"Synopsys","institution_ids":["https://openalex.org/I1335490905"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5087036362"],"corresponding_institution_ids":["https://openalex.org/I1335490905"],"apc_list":null,"apc_paid":null,"fwci":0.7891,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.77577013,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.588749885559082},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.575075626373291},{"id":"https://openalex.org/keywords/planar","display_name":"Planar","score":0.5695059299468994},{"id":"https://openalex.org/keywords/scope","display_name":"Scope (computer science)","score":0.5505679249763489},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49219217896461487},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4868692457675934},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4433499872684479},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4216564893722534},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.38779130578041077},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3318573236465454},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3286289572715759},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3083081841468811},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1764240264892578}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.588749885559082},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.575075626373291},{"id":"https://openalex.org/C134786449","wikidata":"https://www.wikidata.org/wiki/Q3391255","display_name":"Planar","level":2,"score":0.5695059299468994},{"id":"https://openalex.org/C2778012447","wikidata":"https://www.wikidata.org/wiki/Q1034415","display_name":"Scope (computer science)","level":2,"score":0.5505679249763489},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49219217896461487},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4868692457675934},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4433499872684479},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4216564893722534},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.38779130578041077},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3318573236465454},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3286289572715759},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3083081841468811},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1764240264892578},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts.2015.7493149","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2015.7493149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6600000262260437,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1567437819","https://openalex.org/W1998374178","https://openalex.org/W2033810900","https://openalex.org/W2041508134","https://openalex.org/W2045775916","https://openalex.org/W2050259762","https://openalex.org/W2082479800","https://openalex.org/W2090418340","https://openalex.org/W2103657905","https://openalex.org/W2105018445","https://openalex.org/W2108159395","https://openalex.org/W2133690084","https://openalex.org/W2161242714","https://openalex.org/W2536886358","https://openalex.org/W3147973210","https://openalex.org/W6683891485","https://openalex.org/W6728795750"],"related_works":["https://openalex.org/W2010009304","https://openalex.org/W2254931227","https://openalex.org/W3021694725","https://openalex.org/W4319440797","https://openalex.org/W2225406648","https://openalex.org/W1996851061","https://openalex.org/W2940695648","https://openalex.org/W1973684381","https://openalex.org/W2386785728","https://openalex.org/W2096304864"],"abstract_inverted_index":{"Rapidly":[0],"developing":[1],"FinFET":[2,24,36],"technology,":[3,9],"alternative":[4],"to":[5,20,39,60,74,79],"the":[6,26,45,76,84,89,102,106,115],"conventional":[7],"planar":[8,40],"plays":[10],"an":[11],"important":[12],"role":[13],"in":[14],"routing":[15],"modern":[16],"silicon":[17],"industry.":[18],"Due":[19],"unique":[21],"structure":[22],"of":[23,86,105],"transistors":[25,37],"defect":[27],"types":[28],"and":[29,52],"resulting":[30],"fault":[31],"models":[32],"is":[33,71,94,109],"different":[34],"for":[35,49,56,64,96],"compared":[38],"ones.":[41],"As":[42],"a":[43,72],"result":[44],"well-established":[46],"flow":[47,93],"used":[48],"embedded":[50],"test":[51,91],"repair":[53],"solutions":[54],"development":[55],"MOSFET-based":[57],"memories":[58,66],"fails":[59],"be":[61],"smoothly":[62],"deployed":[63],"FinFET-based":[65,81,97],"as":[67,99,101],"well.":[68],"Thus":[69],"there":[70],"need":[73],"modify":[75],"existing":[77],"solution":[78],"support":[80],"memories.":[82],"In":[83],"scope":[85],"this":[87],"paper":[88],"upgraded":[90],"methodology":[92],"introduced":[95],"memories,":[98],"well":[100],"high-level":[103],"overview":[104],"comprehensive":[107],"study":[108],"presented":[110],"which":[111],"was":[112],"conducted":[113],"using":[114],"described":[116],"flow.":[117]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}