{"id":"https://openalex.org/W2438927324","doi":"https://doi.org/10.1109/ewdts.2015.7493111","title":"Cell library for speed-independent VLSI","display_name":"Cell library for speed-independent VLSI","publication_year":2015,"publication_date":"2015-09-01","ids":{"openalex":"https://openalex.org/W2438927324","doi":"https://doi.org/10.1109/ewdts.2015.7493111","mag":"2438927324"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts.2015.7493111","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2015.7493111","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015068592","display_name":"Yu. A. Stepchenkov","orcid":null},"institutions":[{"id":"https://openalex.org/I1313323035","display_name":"Russian Academy of Sciences","ror":"https://ror.org/05qrfxd25","country_code":"RU","type":"funder","lineage":["https://openalex.org/I1313323035"]}],"countries":["RU"],"is_corresponding":true,"raw_author_name":"Y. A. Stepchenkov","raw_affiliation_strings":["Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation"],"affiliations":[{"raw_affiliation_string":"Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation","institution_ids":["https://openalex.org/I1313323035"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112143042","display_name":"Victor N. Zakharov","orcid":null},"institutions":[{"id":"https://openalex.org/I1313323035","display_name":"Russian Academy of Sciences","ror":"https://ror.org/05qrfxd25","country_code":"RU","type":"funder","lineage":["https://openalex.org/I1313323035"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"V. N. Zakharov","raw_affiliation_strings":["Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation"],"affiliations":[{"raw_affiliation_string":"Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation","institution_ids":["https://openalex.org/I1313323035"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059244811","display_name":"Yury Diachenko","orcid":null},"institutions":[{"id":"https://openalex.org/I1313323035","display_name":"Russian Academy of Sciences","ror":"https://ror.org/05qrfxd25","country_code":"RU","type":"funder","lineage":["https://openalex.org/I1313323035"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"Y. G. Diachenko","raw_affiliation_strings":["Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation"],"affiliations":[{"raw_affiliation_string":"Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation","institution_ids":["https://openalex.org/I1313323035"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048346690","display_name":"N. V. Morozov","orcid":null},"institutions":[{"id":"https://openalex.org/I1313323035","display_name":"Russian Academy of Sciences","ror":"https://ror.org/05qrfxd25","country_code":"RU","type":"funder","lineage":["https://openalex.org/I1313323035"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"N. V. Morozov","raw_affiliation_strings":["Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation"],"affiliations":[{"raw_affiliation_string":"Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation","institution_ids":["https://openalex.org/I1313323035"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110417664","display_name":"D.Yu. Stepchenkov","orcid":null},"institutions":[{"id":"https://openalex.org/I1313323035","display_name":"Russian Academy of Sciences","ror":"https://ror.org/05qrfxd25","country_code":"RU","type":"funder","lineage":["https://openalex.org/I1313323035"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"D. Y. Stepchenkov","raw_affiliation_strings":["Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation"],"affiliations":[{"raw_affiliation_string":"Computer Science and Control, Russian Academy of Sciences, Moscow, Russian Federation","institution_ids":["https://openalex.org/I1313323035"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5015068592"],"corresponding_institution_ids":["https://openalex.org/I1313323035"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.1960804,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"24","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9800999760627747,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9800999760627747,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9404000043869019,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9233999848365784,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/unary-operation","display_name":"Unary operation","score":0.7655267715454102},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7297471761703491},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.695763111114502},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6323633193969727},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.54847252368927},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5016586780548096},{"id":"https://openalex.org/keywords/digital-library","display_name":"Digital library","score":0.459191232919693},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4026985466480255},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.31666743755340576},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28623664379119873},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.28385525941848755},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1761241853237152}],"concepts":[{"id":"https://openalex.org/C78023250","wikidata":"https://www.wikidata.org/wiki/Q657596","display_name":"Unary operation","level":2,"score":0.7655267715454102},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7297471761703491},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.695763111114502},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6323633193969727},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.54847252368927},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5016586780548096},{"id":"https://openalex.org/C513874922","wikidata":"https://www.wikidata.org/wiki/Q212805","display_name":"Digital library","level":3,"score":0.459191232919693},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4026985466480255},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.31666743755340576},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28623664379119873},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.28385525941848755},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1761241853237152},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C164913051","wikidata":"https://www.wikidata.org/wiki/Q482","display_name":"Poetry","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts.2015.7493111","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2015.7493111","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47999998927116394,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W961099724","https://openalex.org/W1481548771","https://openalex.org/W1483902580","https://openalex.org/W1509098694","https://openalex.org/W7062389935"],"related_works":["https://openalex.org/W2888918612","https://openalex.org/W2166285859","https://openalex.org/W3148597776","https://openalex.org/W2072989701","https://openalex.org/W1738647919","https://openalex.org/W3000179092","https://openalex.org/W1986774039","https://openalex.org/W2050511294","https://openalex.org/W2118321428","https://openalex.org/W98108296"],"abstract_inverted_index":{"Paper":[0],"describes":[1],"content":[2],"and":[3,29,46],"implementation":[4],"features":[5],"of":[6,42,53],"the":[7],"cell":[8],"library":[9,18,37],"intended":[10],"for":[11],"digital":[12,54],"self-timed":[13],"(speed-independent)":[14],"circuit":[15],"design.":[16],"The":[17,36],"contains":[19],"more":[20],"than":[21],"200":[22],"cells.":[23],"Self-timed":[24],"triggers":[25,30],"with":[26,31],"unary":[27],"input":[28],"forced":[32],"output":[33],"are":[34],"presented.":[35],"was":[38,47],"certified":[39],"by":[40],"means":[41],"developed":[43],"characterization":[44],"tool":[45],"practically":[48],"tested":[49],"in":[50,59],"a":[51],"set":[52],"signal":[55],"processing":[56],"units":[57],"manufactured":[58],"differential":[60],"CMOS":[61],"processes.":[62]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}