{"id":"https://openalex.org/W1993517433","doi":"https://doi.org/10.1109/ewdts.2013.6673169","title":"Transaction level model of embedded processor for vector-logical analysis","display_name":"Transaction level model of embedded processor for vector-logical analysis","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W1993517433","doi":"https://doi.org/10.1109/ewdts.2013.6673169","mag":"1993517433"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts.2013.6673169","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2013.6673169","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"East-West Design &amp; Test Symposium (EWDTS 2013)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108061655","display_name":"Irina Hahanova","orcid":"https://orcid.org/0000-0002-8319-0430"},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Irina V. Hahanova","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005624281","display_name":"Volodymyr Obrizan","orcid":"https://orcid.org/0000-0002-1835-4056"},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Volodymyr Obrizan","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084305447","display_name":"Alexander Adamov","orcid":"https://orcid.org/0000-0002-0120-5388"},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Alexander Adamov","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082569516","display_name":"Dmitry Shcherbin","orcid":null},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Dmitry Shcherbin","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.509,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.71188257,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14470","display_name":"Advanced Data Processing Techniques","score":0.9814000129699707,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14470","display_name":"Advanced Data Processing Techniques","score":0.9814000129699707,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13734","display_name":"Advanced Computational Techniques and Applications","score":0.9736999869346619,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13062","display_name":"Cognitive Computing and Networks","score":0.9538999795913696,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7890570163726807},{"id":"https://openalex.org/keywords/relation","display_name":"Relation (database)","score":0.650300920009613},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6406413316726685},{"id":"https://openalex.org/keywords/logical-analysis","display_name":"Logical analysis","score":0.606597900390625},{"id":"https://openalex.org/keywords/database-transaction","display_name":"Database transaction","score":0.566321611404419},{"id":"https://openalex.org/keywords/semantics","display_name":"Semantics (computer science)","score":0.5600202679634094},{"id":"https://openalex.org/keywords/logical-data-model","display_name":"Logical data model","score":0.5314643979072571},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4006376266479492},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3576350212097168},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3435271084308624},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3402473032474518},{"id":"https://openalex.org/keywords/data-modeling","display_name":"Data modeling","score":0.29674577713012695},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.22656279802322388}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7890570163726807},{"id":"https://openalex.org/C25343380","wikidata":"https://www.wikidata.org/wiki/Q277521","display_name":"Relation (database)","level":2,"score":0.650300920009613},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6406413316726685},{"id":"https://openalex.org/C2983390893","wikidata":"https://www.wikidata.org/wiki/Q1092582","display_name":"Logical analysis","level":3,"score":0.606597900390625},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.566321611404419},{"id":"https://openalex.org/C184337299","wikidata":"https://www.wikidata.org/wiki/Q1437428","display_name":"Semantics (computer science)","level":2,"score":0.5600202679634094},{"id":"https://openalex.org/C203702819","wikidata":"https://www.wikidata.org/wiki/Q17146953","display_name":"Logical data model","level":3,"score":0.5314643979072571},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4006376266479492},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3576350212097168},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3435271084308624},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3402473032474518},{"id":"https://openalex.org/C67186912","wikidata":"https://www.wikidata.org/wiki/Q367664","display_name":"Data modeling","level":2,"score":0.29674577713012695},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.22656279802322388},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C6260981","wikidata":"https://www.wikidata.org/wiki/Q745328","display_name":"Mathematical statistics","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts.2013.6673169","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2013.6673169","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"East-West Design &amp; Test Symposium (EWDTS 2013)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1602612484","https://openalex.org/W2277427167","https://openalex.org/W4214633034","https://openalex.org/W4254116315","https://openalex.org/W6695231666"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W3042736233","https://openalex.org/W2082487009","https://openalex.org/W2373535795","https://openalex.org/W2406926880","https://openalex.org/W4242992945","https://openalex.org/W4200315556"],"abstract_inverted_index":{"Transaction":[0],"level":[1],"model":[2,31],"of":[3,10,23,29,37,48],"embedded":[4,41],"processor":[5,42],"for":[6,33],"improving":[7],"the":[8,20,30,34],"performance":[9],"logical":[11],"relation":[12],"analysis":[13,36],"are":[14,27],"proposed.":[15],"It":[16],"is":[17],"based":[18],"on":[19,54],"hardware":[21],"implementation":[22],"vector":[24],"operations.":[25],"There":[26],"examples":[28],"using":[32],"semantics":[35],"Russian":[38],"adjectives.":[39],"The":[40],"was":[43],"designed":[44],"to":[45],"be":[46,52],"part":[47],"SoC":[49],"that":[50],"will":[51],"implemented":[53],"FPGA.":[55]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
