{"id":"https://openalex.org/W2003907996","doi":"https://doi.org/10.1109/ewdts.2011.6116605","title":"A diagnostic model for detecting functional violation in HDL-code of System-on-Chip","display_name":"A diagnostic model for detecting functional violation in HDL-code of System-on-Chip","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W2003907996","doi":"https://doi.org/10.1109/ewdts.2011.6116605","mag":"2003907996"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts.2011.6116605","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2011.6116605","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th East-West Design &amp; Test Symposium (EWDTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031608453","display_name":"Ngene Christopher Umerah","orcid":null},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":true,"raw_author_name":"Ngene Christopher Umerah","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]},{"author_position":"last","author":{"id":null,"display_name":"Hahanov Vladimir Ivanovich","orcid":null},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Hahanov Vladimir Ivanovich","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5031608453"],"corresponding_institution_ids":["https://openalex.org/I107158390"],"apc_list":null,"apc_paid":null,"fwci":0.5154,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65522003,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"299","last_page":"302"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7796624898910522},{"id":"https://openalex.org/keywords/assertion","display_name":"Assertion","score":0.5750380754470825},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5416979193687439},{"id":"https://openalex.org/keywords/transaction-level-modeling","display_name":"Transaction-level modeling","score":0.5201323628425598},{"id":"https://openalex.org/keywords/database-transaction","display_name":"Database transaction","score":0.517665445804596},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45509690046310425},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4498056173324585},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4493567645549774},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.4290737509727478},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.41844138503074646},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3554246127605438},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34250926971435547},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.32095640897750854}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7796624898910522},{"id":"https://openalex.org/C40422974","wikidata":"https://www.wikidata.org/wiki/Q741248","display_name":"Assertion","level":2,"score":0.5750380754470825},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5416979193687439},{"id":"https://openalex.org/C169571997","wikidata":"https://www.wikidata.org/wiki/Q966099","display_name":"Transaction-level modeling","level":3,"score":0.5201323628425598},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.517665445804596},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45509690046310425},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4498056173324585},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4493567645549774},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.4290737509727478},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.41844138503074646},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3554246127605438},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34250926971435547},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.32095640897750854},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts.2011.6116605","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2011.6116605","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th East-West Design &amp; Test Symposium (EWDTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1602612484","https://openalex.org/W2044602391","https://openalex.org/W2121398316","https://openalex.org/W4236640323"],"related_works":["https://openalex.org/W1581055755","https://openalex.org/W2149449165","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W1869483461","https://openalex.org/W2136854845","https://openalex.org/W2112223413","https://openalex.org/W4245833509","https://openalex.org/W2123581614","https://openalex.org/W2385778187"],"abstract_inverted_index":{"The":[0,23,73],"design":[1,29],"of":[2,17,25,30,44,62,94],"System-on-Chip":[3],"(SoC)":[4],"is":[5,49],"becoming":[6],"more":[7,35],"difficult":[8],"by":[9],"the":[10,13,28],"day":[11],"with":[12,46,104],"increase":[14],"in":[15,27,65,78,107],"complexity":[16],"consumer":[18],"requirements":[19],"and":[20,37,55,58],"time-to-market":[21],"pressures.":[22],"use":[24],"HDLs":[26],"digital":[31],"system":[32],"has":[33],"become":[34],"ubiquitous":[36],"challenging":[38],"as":[39],"ever":[40],"if":[41],"timely":[42],"delivery":[43],"product":[45],"increased":[47],"yield":[48],"to":[50],"be":[51,82],"achieved.":[52],"A":[53],"technological":[54],"process-efficient":[56],"models":[57],"methods":[59],"for":[60,99],"diagnosis":[61],"functional":[63,105],"violations":[64],"software":[66],"and/":[67],"or":[68,102],"hardware":[69],"products":[70],"are":[71],"proposed.":[72],"assertion-based":[74],"transaction":[75],"graph":[76],"used":[77],"this":[79],"model":[80],"can":[81],"transformed":[83],"into":[84],"a":[85],"tabular":[86],"data":[87],"structure":[88],"that":[89],"focuses":[90],"on":[91],"parallel":[92],"execution":[93],"logic":[95],"operations":[96],"when":[97],"searching":[98],"defective":[100],"components":[101],"blocks":[103],"violation":[106],"HDL":[108],"models.":[109]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}
