{"id":"https://openalex.org/W2041252353","doi":"https://doi.org/10.1109/ewdts.2011.6116598","title":"Designing an embedded system for interfacing with networks based on ARM","display_name":"Designing an embedded system for interfacing with networks based on ARM","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W2041252353","doi":"https://doi.org/10.1109/ewdts.2011.6116598","mag":"2041252353"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts.2011.6116598","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2011.6116598","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046014755","display_name":"Taghi Mohamadi","orcid":null},"institutions":[{"id":"https://openalex.org/I67009956","display_name":"Iran University of Science and Technology","ror":"https://ror.org/01jw2p796","country_code":"IR","type":"education","lineage":["https://openalex.org/I67009956"]}],"countries":["IR"],"is_corresponding":true,"raw_author_name":"Taghi Mohamadi","raw_affiliation_strings":["Iran University of Science and Technology, Tehran, Iran","Iran University of Science and Technology (IUST), Tehran, Iran#TAB#"],"affiliations":[{"raw_affiliation_string":"Iran University of Science and Technology, Tehran, Iran","institution_ids":["https://openalex.org/I67009956"]},{"raw_affiliation_string":"Iran University of Science and Technology (IUST), Tehran, Iran#TAB#","institution_ids":["https://openalex.org/I67009956"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5046014755"],"corresponding_institution_ids":["https://openalex.org/I67009956"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.09712587,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"129","issue":null,"first_page":"407","last_page":"410"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9868000149726868,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9868000149726868,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9302999973297119,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13734","display_name":"Advanced Computational Techniques and Applications","score":0.9136999845504761,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7161410450935364},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6998975872993469},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.6231200098991394},{"id":"https://openalex.org/keywords/ethernet","display_name":"Ethernet","score":0.6055958867073059},{"id":"https://openalex.org/keywords/default-gateway","display_name":"Default gateway","score":0.5048239827156067},{"id":"https://openalex.org/keywords/usb","display_name":"USB","score":0.4874744415283203},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.4731539189815521},{"id":"https://openalex.org/keywords/data-acquisition","display_name":"Data acquisition","score":0.46227532625198364},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4574543535709381},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38323819637298584},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.3706595301628113},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2782740592956543},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.19230476021766663}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7161410450935364},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6998975872993469},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.6231200098991394},{"id":"https://openalex.org/C172173386","wikidata":"https://www.wikidata.org/wiki/Q79984","display_name":"Ethernet","level":2,"score":0.6055958867073059},{"id":"https://openalex.org/C187713609","wikidata":"https://www.wikidata.org/wiki/Q2465461","display_name":"Default gateway","level":2,"score":0.5048239827156067},{"id":"https://openalex.org/C507366226","wikidata":"https://www.wikidata.org/wiki/Q42378","display_name":"USB","level":3,"score":0.4874744415283203},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.4731539189815521},{"id":"https://openalex.org/C163985040","wikidata":"https://www.wikidata.org/wiki/Q1172399","display_name":"Data acquisition","level":2,"score":0.46227532625198364},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4574543535709381},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38323819637298584},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.3706595301628113},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2782740592956543},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.19230476021766663},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts.2011.6116598","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2011.6116598","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2065780432","https://openalex.org/W2120450274","https://openalex.org/W2171314736","https://openalex.org/W2368857796","https://openalex.org/W4230535538","https://openalex.org/W6666906072","https://openalex.org/W6678435744","https://openalex.org/W6685015835"],"related_works":["https://openalex.org/W2136647108","https://openalex.org/W2350029007","https://openalex.org/W1965180958","https://openalex.org/W1973428399","https://openalex.org/W2182594080","https://openalex.org/W2372811349","https://openalex.org/W2499406489","https://openalex.org/W1971854809","https://openalex.org/W2386412156","https://openalex.org/W2381608072"],"abstract_inverted_index":{"This":[0,80],"paper":[1,81],"presents":[2],"a":[3,7,123,132,136],"method":[4],"to":[5,10,52,141],"design":[6,72],"smart":[8,124],"circuit":[9,33],"interface":[11],"with":[12,48,69,114],"some":[13],"protocols":[14],"such":[15,101],"as":[16,122],"RS232,":[17],"USB,":[18],"CAN,":[19],"and":[20,54,67,76,86,106,128],"the":[21,31,49,57,61,143],"most":[22],"important":[23],"of":[24,78,134],"all:":[25],"Ethernet.":[26],"The":[27],"main":[28],"feature":[29],"in":[30,104,111],"designed":[32,102,140,144],"is":[34],"using":[35],"Real":[36],"Time":[37],"Operating":[38],"System":[39],"(RTOS)":[40],"on":[41,60,93],"ARM":[42],"series":[43],"32-bit":[44],"processors:":[45],"LPC2478.":[46],"Compared":[47],"customary":[50],"ways":[51],"control":[53,105],"data":[55,107],"acquisition,":[56],"device":[58],"based":[59,92],"embedded":[62],"system":[63,103,138],"offers":[64],"better":[65],"features":[66],"flexibility,":[68],"an":[70],"overall":[71],"for":[73,100],"reliability,":[74],"durability":[75],"ease":[77],"installation.":[79],"has":[82],"illustrated":[83],"hardware":[84],"architecture":[85],"real":[87],"time":[88],"multi-task":[89],"software":[90],"process":[91],"\u03bcC/OS-II.":[94],"There":[95],"are":[96],"too":[97],"many":[98],"usages":[99],"acquisition":[108],"systems.":[109],"Especially,":[110],"network":[112],"interfaces":[113],"different":[115],"protocol":[116],"layers,":[117],"it":[118],"can":[119],"be":[120],"used":[121],"gateway":[125],"or":[126],"router":[127],"so":[129],"forth.":[130],"As":[131],"proof":[133],"concept,":[135],"simple":[137],"was":[139],"test":[142],"circuit.":[145]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}