{"id":"https://openalex.org/W2050213494","doi":"https://doi.org/10.1109/ewdts.2011.6116418","title":"Verification and diagnosis of SoC HDL-code","display_name":"Verification and diagnosis of SoC HDL-code","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W2050213494","doi":"https://doi.org/10.1109/ewdts.2011.6116418","mag":"2050213494"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts.2011.6116418","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2011.6116418","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044434351","display_name":"Vladimir Hahanov","orcid":"https://orcid.org/0000-0001-5312-5841"},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":true,"raw_author_name":"Vladimir Hahanov","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066850395","display_name":"Dong Won Park","orcid":null},"institutions":[{"id":"https://openalex.org/I110118728","display_name":"Pai Chai University","ror":"https://ror.org/05drcjw53","country_code":"KR","type":"education","lineage":["https://openalex.org/I110118728"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dong Won Park","raw_affiliation_strings":["Pai Chai University, South Korea","Pai Chai University, the Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Pai Chai University, South Korea","institution_ids":["https://openalex.org/I110118728"]},{"raw_affiliation_string":"Pai Chai University, the Republic of Korea","institution_ids":["https://openalex.org/I110118728"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010555318","display_name":"Olesya Guz","orcid":null},"institutions":[{"id":"https://openalex.org/I75645747","display_name":"Donetsk National Technical University","ror":"https://ror.org/00whe2089","country_code":"UA","type":"education","lineage":["https://openalex.org/I75645747"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Olesya Guz","raw_affiliation_strings":["Road Transport Faculty, Donetsk Institute of Road Transport, Donetsk, Ukraine","Road Transport Faculty, Donetsk Institute of Road Transport, Ukraine"],"affiliations":[{"raw_affiliation_string":"Road Transport Faculty, Donetsk Institute of Road Transport, Donetsk, Ukraine","institution_ids":["https://openalex.org/I75645747"]},{"raw_affiliation_string":"Road Transport Faculty, Donetsk Institute of Road Transport, Ukraine","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026812720","display_name":"Aleksey Priymak","orcid":null},"institutions":[{"id":"https://openalex.org/I107158390","display_name":"Kharkiv National University of Radio Electronics","ror":"https://ror.org/01ctj1b90","country_code":"UA","type":"education","lineage":["https://openalex.org/I107158390"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Aleksey Priymak","raw_affiliation_strings":["Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine","institution_ids":["https://openalex.org/I107158390"]},{"raw_affiliation_string":"Computer Engineering Faculty, Kharkov National University of Radioelectronics, Ukraine","institution_ids":["https://openalex.org/I107158390"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5044434351"],"corresponding_institution_ids":["https://openalex.org/I107158390"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10604181,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"26","issue":null,"first_page":"72","last_page":"83"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9894999861717224,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7717904448509216},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.6405190229415894},{"id":"https://openalex.org/keywords/assertion","display_name":"Assertion","score":0.6104475259780884},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.5952706336975098},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.49464675784111023},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.4781147837638855},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.47228819131851196},{"id":"https://openalex.org/keywords/high-level-verification","display_name":"High-level verification","score":0.4661242961883545},{"id":"https://openalex.org/keywords/software-verification","display_name":"Software verification","score":0.45194295048713684},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.43143635988235474},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41967397928237915},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.3511506915092468},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.20538273453712463},{"id":"https://openalex.org/keywords/software-construction","display_name":"Software construction","score":0.20072534680366516}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7717904448509216},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.6405190229415894},{"id":"https://openalex.org/C40422974","wikidata":"https://www.wikidata.org/wiki/Q741248","display_name":"Assertion","level":2,"score":0.6104475259780884},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.5952706336975098},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.49464675784111023},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.4781147837638855},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.47228819131851196},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.4661242961883545},{"id":"https://openalex.org/C33054407","wikidata":"https://www.wikidata.org/wiki/Q6504747","display_name":"Software verification","level":5,"score":0.45194295048713684},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.43143635988235474},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41967397928237915},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.3511506915092468},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.20538273453712463},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.20072534680366516}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts.2011.6116418","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2011.6116418","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2044602391","https://openalex.org/W2117492568","https://openalex.org/W2121398316","https://openalex.org/W2125581051","https://openalex.org/W2131505548","https://openalex.org/W2132386554","https://openalex.org/W2144357590","https://openalex.org/W2145573547","https://openalex.org/W2159270162","https://openalex.org/W2165354374","https://openalex.org/W2169350980","https://openalex.org/W2171473927","https://openalex.org/W2499565042","https://openalex.org/W3148084094","https://openalex.org/W6679206669","https://openalex.org/W6679652723"],"related_works":["https://openalex.org/W3120172095","https://openalex.org/W3036403349","https://openalex.org/W2118572231","https://openalex.org/W1563456403","https://openalex.org/W1542124114","https://openalex.org/W2162615969","https://openalex.org/W2108860137","https://openalex.org/W1968510839","https://openalex.org/W2138343703","https://openalex.org/W2013077575"],"abstract_inverted_index":{"Xor-metrix":[0],"for":[1,20,52],"object":[2],"relations":[3],"in":[4],"a":[5,10],"vector":[6],"logic":[7],"space":[8],"and":[9,18,23,38],"structural":[11],"testing":[12],"model":[13,44],"are":[14,40],"proposed.":[15],"Assertion-based":[16],"models":[17],"methods":[19],"the":[21],"verification":[22],"diagnosis":[24],"of":[25,36,45],"HDL-code":[26],"functional":[27],"failures,":[28],"which":[29],"make":[30],"possible":[31],"to":[32],"reduce":[33],"considerably":[34],"time-to-market":[35],"software":[37],"hardware,":[39],"developed.":[41],"An":[42],"architectural":[43],"multimatrix":[46],"reduced":[47],"logical":[48],"instruction":[49],"set":[50],"processor":[51],"embedded":[53],"diagnosing":[54],"is":[55],"offered.":[56]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}