{"id":"https://openalex.org/W2169607834","doi":"https://doi.org/10.1109/etw.2003.1231666","title":"Yield analysis for repairable embedded memories","display_name":"Yield analysis for repairable embedded memories","publication_year":2004,"publication_date":"2004-01-23","ids":{"openalex":"https://openalex.org/W2169607834","doi":"https://doi.org/10.1109/etw.2003.1231666","mag":"2169607834"},"language":"en","primary_location":{"id":"doi:10.1109/etw.2003.1231666","is_oa":false,"landing_page_url":"https://doi.org/10.1109/etw.2003.1231666","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The Eighth IEEE European Test Workshop, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069836668","display_name":"Anuja Sehgal","orcid":null},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Sehgal","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049774675","display_name":"Ankit Dubey","orcid":"https://orcid.org/0000-0002-4202-0451"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"A. Dubey","raw_affiliation_strings":["VLSI Design, Tools and Technology Hauz Khas, Indian Institute of Technology, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design, Tools and Technology Hauz Khas, Indian Institute of Technology, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044629739","display_name":"Erik Jan Marinissen","orcid":"https://orcid.org/0000-0002-5058-8303"},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"E.J. Marinissen","raw_affiliation_strings":["Philips Research Digital Design and Test, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Digital Design and Test, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045188940","display_name":"Clemens Wouters","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]},{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"C. Wouters","raw_affiliation_strings":["Philips Semiconductors Advanced Memory Design Center, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Semiconductors Advanced Memory Design Center, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I109147379","https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062126489","display_name":"Harald Vranken","orcid":"https://orcid.org/0000-0003-4541-6475"},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"H. Vranken","raw_affiliation_strings":["Philips Research Digital Design and Test, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Digital Design and Test, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033880864","display_name":"Krishnendu Chakrabarty","orcid":"https://orcid.org/0000-0003-4475-6435"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Chakrabarty","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.06,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.77882267,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"35","last_page":"40"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/row","display_name":"Row","score":0.8338671922683716},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.7893613576889038},{"id":"https://openalex.org/keywords/row-and-column-spaces","display_name":"Row and column spaces","score":0.777090311050415},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6742593050003052},{"id":"https://openalex.org/keywords/column","display_name":"Column (typography)","score":0.663742184638977},{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.5644726753234863},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5309239029884338},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.4161187410354614},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.4093155562877655},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20682832598686218},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15088418126106262},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12163957953453064},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09036928415298462}],"concepts":[{"id":"https://openalex.org/C135598885","wikidata":"https://www.wikidata.org/wiki/Q1366302","display_name":"Row","level":2,"score":0.8338671922683716},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.7893613576889038},{"id":"https://openalex.org/C104140500","wikidata":"https://www.wikidata.org/wiki/Q2088159","display_name":"Row and column spaces","level":3,"score":0.777090311050415},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6742593050003052},{"id":"https://openalex.org/C2780551164","wikidata":"https://www.wikidata.org/wiki/Q2306599","display_name":"Column (typography)","level":3,"score":0.663742184638977},{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.5644726753234863},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5309239029884338},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.4161187410354614},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4093155562877655},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20682832598686218},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15088418126106262},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12163957953453064},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09036928415298462},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":5,"locations":[{"id":"doi:10.1109/etw.2003.1231666","is_oa":false,"landing_page_url":"https://doi.org/10.1109/etw.2003.1231666","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The Eighth IEEE European Test Workshop, 2003. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:872259","is_oa":false,"landing_page_url":"http://library.tue.nl/csp/dare/LinkToRepository.csp?recordnumber=872259","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISBN:0-7695-1908-3","raw_type":"Part of book or chapter of book"},{"id":"pmh:877057","is_oa":false,"landing_page_url":"http://library.tue.nl/csp/dare/LinkToRepository.csp?recordnumber=877057","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISBN:0-7695-1908-3","raw_type":"Part of book or chapter of book"},{"id":"pmh:oai:library.tue.nl:872259","is_oa":false,"landing_page_url":"http://repository.tue.nl/872259","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISBN:0-7695-1908-3","raw_type":"Part of book or chapter of book"},{"id":"pmh:oai:library.tue.nl:877057","is_oa":false,"landing_page_url":"http://repository.tue.nl/877057","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISBN:0-7695-1908-3","raw_type":"Part of book or chapter of book"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4399999976158142}],"awards":[],"funders":[{"id":"https://openalex.org/F4320324473","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1633725890","https://openalex.org/W1847672273","https://openalex.org/W1922918362","https://openalex.org/W1988192422","https://openalex.org/W2038176281","https://openalex.org/W2040066907","https://openalex.org/W2071417872","https://openalex.org/W2096018418","https://openalex.org/W2098987953","https://openalex.org/W2101406832","https://openalex.org/W2117314013","https://openalex.org/W2124568221","https://openalex.org/W2139641851","https://openalex.org/W2155599474","https://openalex.org/W2157130998","https://openalex.org/W2164333395","https://openalex.org/W2536711357","https://openalex.org/W2917224946","https://openalex.org/W4240398493","https://openalex.org/W4256002266","https://openalex.org/W6680745762"],"related_works":["https://openalex.org/W2344117897","https://openalex.org/W2313440505","https://openalex.org/W3123744736","https://openalex.org/W2137691148","https://openalex.org/W1505848319","https://openalex.org/W4281399881","https://openalex.org/W2433052208","https://openalex.org/W3166006430","https://openalex.org/W4281971614","https://openalex.org/W2096502566"],"abstract_inverted_index":{"Repairable":[0],"embedded":[1,38],"memories":[2],"help":[3],"improve":[4],"the":[5,81,102,127],"overall":[6],"yield":[7,15,21],"of":[8,66,92,101,113,129],"an":[9,110],"IC.":[10],"We":[11],"have":[12,73],"developed":[13,74],"a":[14,63,75,119],"analysis":[16],"tool":[17,105],"that":[18],"provides":[19],"realistic":[20],"estimates":[22],"for":[23,31,118],"both":[24],"single":[25],"repairable":[26,37],"memories,":[27],"as":[28,30,122,124],"well":[29,123],"ICs":[32],"containing":[33],"multiple,":[34],"possibly":[35],"different,":[36],"memories.":[39],"Our":[40,104],"approach":[41],"uses":[42],"pseudo-randomly":[43],"generated":[44],"fault":[45,57],"bit-maps,":[46],"which":[47],"are":[48],"based":[49],"on":[50],"memory":[51,68,77,84],"area":[52],"size,":[53],"defect":[54],"density,":[55],"and":[56,69,94,96,98,116],"distribution.":[58],"In":[59],"order":[60],"to":[61,108,125],"accommodate":[62],"wide":[64],"range":[65],"industrial":[67],"redundancy":[70],"organizations,":[71],"we":[72],"flexible":[76],"model.":[78],"It":[79],"generalizes":[80],"traditional":[82],"simple":[83],"matrix":[85],"model":[86],"with":[87],"partitioning":[88],"into":[89],"regions,":[90],"grouping":[91],"columns":[93,115],"rows,":[95],"column-wise":[97],"row-wise":[99],"coupling":[100],"spares.":[103],"is":[106],"used":[107],"determine":[109,126],"optimal":[111],"amount":[112],"spare":[114],"rows":[117],"given":[120],"memory,":[121],"effectiveness":[128],"various":[130],"repair":[131],"algorithms.":[132]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}