{"id":"https://openalex.org/W2129437137","doi":"https://doi.org/10.1109/etsym.2010.5512775","title":"Full-circuit SPICE simulation based validation of dynamic delay estimation","display_name":"Full-circuit SPICE simulation based validation of dynamic delay estimation","publication_year":2010,"publication_date":"2010-05-01","ids":{"openalex":"https://openalex.org/W2129437137","doi":"https://doi.org/10.1109/etsym.2010.5512775","mag":"2129437137"},"language":"en","primary_location":{"id":"doi:10.1109/etsym.2010.5512775","is_oa":false,"landing_page_url":"https://doi.org/10.1109/etsym.2010.5512775","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th IEEE European Test Symposium","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101499823","display_name":"Ke Peng","orcid":"https://orcid.org/0000-0002-4972-6457"},"institutions":[{"id":"https://openalex.org/I140172145","display_name":"University of Connecticut","ror":"https://ror.org/02der9h97","country_code":"US","type":"education","lineage":["https://openalex.org/I140172145"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ke Peng","raw_affiliation_strings":["ECE Department, University of Connecticut, Storrs, CT, USA","ECE Department University of Connecticut Storrs, CT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE Department, University of Connecticut, Storrs, CT, USA","institution_ids":["https://openalex.org/I140172145"]},{"raw_affiliation_string":"ECE Department University of Connecticut Storrs, CT, USA","institution_ids":["https://openalex.org/I140172145"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101775144","display_name":"Yu Huang","orcid":"https://orcid.org/0000-0003-2619-4686"},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yu Huang","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA","Mentor Graphics, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]},{"raw_affiliation_string":"Mentor Graphics, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022903336","display_name":"Pinki Mallick","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pinki Mallick","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA","Mentor Graphics, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]},{"raw_affiliation_string":"Mentor Graphics, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020407423","display_name":"Wu-Tung Cheng","orcid":"https://orcid.org/0000-0001-6327-2394"},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wu-Tung Cheng","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA","Mentor Graphics, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]},{"raw_affiliation_string":"Mentor Graphics, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113697198","display_name":"Mohammad Tehranipoor","orcid":null},"institutions":[{"id":"https://openalex.org/I140172145","display_name":"University of Connecticut","ror":"https://ror.org/02der9h97","country_code":"US","type":"education","lineage":["https://openalex.org/I140172145"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohammad Tehranipoor","raw_affiliation_strings":["ECE Department, University of Connecticut, Storrs, CT, USA","ECE Department University of Connecticut Storrs, CT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE Department, University of Connecticut, Storrs, CT, USA","institution_ids":["https://openalex.org/I140172145"]},{"raw_affiliation_string":"ECE Department University of Connecticut Storrs, CT, USA","institution_ids":["https://openalex.org/I140172145"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"101","last_page":"106"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.9115453362464905},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7567033767700195},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.5353904366493225},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.5340204834938049},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.47217196226119995},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4594508111476898},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.44692039489746094},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.3591046929359436},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.350341260433197},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2561216652393341},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15305042266845703},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.12248381972312927},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10059219598770142}],"concepts":[{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.9115453362464905},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7567033767700195},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.5353904366493225},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.5340204834938049},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.47217196226119995},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4594508111476898},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.44692039489746094},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.3591046929359436},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.350341260433197},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2561216652393341},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15305042266845703},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.12248381972312927},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10059219598770142},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/etsym.2010.5512775","is_oa":false,"landing_page_url":"https://doi.org/10.1109/etsym.2010.5512775","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th IEEE European Test Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7400000095367432,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1568407911","https://openalex.org/W2054718237","https://openalex.org/W2063306416","https://openalex.org/W2095779147","https://openalex.org/W2100708884","https://openalex.org/W2109799272","https://openalex.org/W2116957391","https://openalex.org/W2117791241","https://openalex.org/W2133093888","https://openalex.org/W2134980804","https://openalex.org/W2148008037","https://openalex.org/W2170506040","https://openalex.org/W3145605605","https://openalex.org/W4205666887","https://openalex.org/W4236133696","https://openalex.org/W6684847144"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W3135165657","https://openalex.org/W1485582195","https://openalex.org/W4229489461","https://openalex.org/W2099825670","https://openalex.org/W1965160169","https://openalex.org/W2380223518"],"abstract_inverted_index":{"Power":[0],"supply":[1],"noise":[2],"may":[3],"have":[4],"big":[5],"impacts":[6],"on":[7,50],"the":[8,12,17,31,87,95],"design":[9],"performance":[10,36],"in":[11],"latest":[13],"technologies.":[14],"Accurately":[15],"mapping":[16],"IR-drop":[18,34],"effect":[19],"to":[20,65],"real":[21],"delay":[22],"is":[23,82],"a":[24,63],"challenging":[25],"task,":[26],"which":[27,84],"will":[28],"directly":[29],"impact":[30],"accuracy":[32,96],"of":[33,97],"related":[35],"evaluation,":[37],"test,":[38],"and":[39],"diagnosis.":[40],"In":[41,77],"this":[42,58,67,78],"paper,":[43],"we":[44],"first":[45],"present":[46],"our":[47],"previous":[48],"work":[49],"setting":[51],"up":[52],"an":[53],"IR2Delay":[54],"database":[55,68],"for":[56],"addressing":[57],"issue.":[59],"We":[60],"then":[61],"propose":[62],"flow":[64],"validate":[66],"by":[69],"comparing":[70],"it":[71],"with":[72],"full-circuit":[73],"SPICE":[74,98],"simulation":[75,81],"results.":[76],"flow,":[79],"mixed-signal":[80],"used,":[83],"can":[85],"reuse":[86],"existing":[88],"digital":[89],"testbench":[90],"as":[91],"stimuli":[92],"while":[93],"maintaining":[94],"simulation.":[99]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
