{"id":"https://openalex.org/W2037126791","doi":"https://doi.org/10.1109/etsym.2010.5512757","title":"An integrated flow for the design of hardened circuits on SRAM-based FPGAs","display_name":"An integrated flow for the design of hardened circuits on SRAM-based FPGAs","publication_year":2010,"publication_date":"2010-05-01","ids":{"openalex":"https://openalex.org/W2037126791","doi":"https://doi.org/10.1109/etsym.2010.5512757","mag":"2037126791"},"language":"en","primary_location":{"id":"doi:10.1109/etsym.2010.5512757","is_oa":false,"landing_page_url":"https://doi.org/10.1109/etsym.2010.5512757","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th IEEE European Test Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014159983","display_name":"Cristiana Bolchini","orcid":"https://orcid.org/0000-0001-5065-7906"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Cristiana Bolchini","raw_affiliation_strings":["Dipartimento Elettronica e Informazione, Politecnico di Turino, Milan, Italy","Dip. Elettronica e Informazione, Politecnico di Milano, Milano - Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento Elettronica e Informazione, Politecnico di Turino, Milan, Italy","institution_ids":[]},{"raw_affiliation_string":"Dip. Elettronica e Informazione, Politecnico di Milano, Milano - Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031451381","display_name":"Antonio Miele","orcid":"https://orcid.org/0000-0003-3197-0723"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Antonio Miele","raw_affiliation_strings":["Dipartimento Elettronica e Informazione, Politecnico di Turino, Milan, Italy","Dip. Elettronica e Informazione, Politecnico di Milano, Milano - Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento Elettronica e Informazione, Politecnico di Turino, Milan, Italy","institution_ids":[]},{"raw_affiliation_string":"Dip. Elettronica e Informazione, Politecnico di Milano, Milano - Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047593060","display_name":"Chiara Sandionigi","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Chiara Sandionigi","raw_affiliation_strings":["Dipartimento Elettronica e Informazione, Politecnico di Turino, Milan, Italy","Dip. Elettronica e Informazione, Politecnico di Milano, Milano - Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento Elettronica e Informazione, Politecnico di Turino, Milan, Italy","institution_ids":[]},{"raw_affiliation_string":"Dip. Elettronica e Informazione, Politecnico di Milano, Milano - Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080823596","display_name":"Niccol\u00f2 Battezzati","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Niccolo Battezzati","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","[Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy]"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"[Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy]","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021426042","display_name":"Luca Sterpone","orcid":"https://orcid.org/0000-0002-3080-2560"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Sterpone","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","[Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy]"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"[Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy]","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087219426","display_name":"M. Violante","orcid":"https://orcid.org/0000-0002-5821-3418"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Massimo Violante","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","[Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy]"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"[Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy]","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5014159983"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":1.4705,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.83574825,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"197","issue":null,"first_page":"214","last_page":"219"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8102681636810303},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7769817113876343},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.727562427520752},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7259061932563782},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6932649612426758},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6609855890274048},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5516704320907593},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4759773313999176},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4493197202682495},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3747326135635376},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.32071036100387573},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22448652982711792},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.18980136513710022},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11799013614654541}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8102681636810303},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7769817113876343},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.727562427520752},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7259061932563782},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6932649612426758},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6609855890274048},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5516704320907593},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4759773313999176},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4493197202682495},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3747326135635376},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.32071036100387573},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22448652982711792},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.18980136513710022},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11799013614654541},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/etsym.2010.5512757","is_oa":false,"landing_page_url":"https://doi.org/10.1109/etsym.2010.5512757","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th IEEE European Test Symposium","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.187.2270","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.187.2270","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://dftgroup.uniroma2.it/prin2008/lib/exe/fetch.php?media=ets2010.pdf","raw_type":"text"},{"id":"pmh:oai:porto.polito.it:2372156","is_oa":false,"landing_page_url":"http://porto.polito.it/2372156/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:re.public.polimi.it:11311/571070","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/571070","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1549261274","https://openalex.org/W1970885193","https://openalex.org/W2015769541","https://openalex.org/W2106635847","https://openalex.org/W2116097016","https://openalex.org/W2119901643","https://openalex.org/W2120034842","https://openalex.org/W2122512228","https://openalex.org/W2135743241","https://openalex.org/W2141043432","https://openalex.org/W2169480831","https://openalex.org/W2171125685"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2096938998","https://openalex.org/W1760305469"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3,51],"enhanced":[4,52],"design":[5],"flow":[6,89],"for":[7],"the":[8,20,36,48,79,83,87,91,94],"implementation":[9],"of":[10,22,38,78,82,93],"hardened":[11],"systems":[12],"on":[13,98],"SRAM-based":[14],"FPGAs,":[15],"able":[16],"to":[17,34,46,66],"cope":[18],"with":[19,56],"occurrence":[21],"Single":[23],"Event":[24],"Upsets":[25],"(SEUs).":[26],"The":[27],"framework":[28],"integrates":[29],"three":[30],"strategies":[31],"independently":[32],"designed":[33],"tackle":[35],"problem":[37],"SEUs;":[39],"first":[40],"a":[41,61,74,99],"systematic":[42],"methodology":[43],"is":[44,64],"used":[45],"harden":[47],"circuit":[49],"exploiting":[50],"TMR-based":[53],"technique,":[54],"coupled":[55],"partial":[57],"dynamic":[58],"reconfiguration.":[59],"Then,":[60],"robustness":[62],"analysis":[63],"performed":[65],"identify":[67],"possible":[68],"TMR":[69],"failures,":[70],"eventually":[71],"solved":[72],"by":[73],"specific":[75],"local":[76],"re-design":[77],"critical":[80],"portions":[81],"implementation.":[84],"We":[85],"present":[86],"overall":[88],"and":[90],"benefits":[92],"solution,":[95],"experimentally":[96],"evaluated":[97],"realistic":[100],"circuit.":[101]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
