{"id":"https://openalex.org/W7167980387","doi":"https://doi.org/10.1109/ets69887.2026.11591580","title":"Fast Circuit Analysis via Neighborhood-Guided Maximum Common Subgraph","display_name":"Fast Circuit Analysis via Neighborhood-Guided Maximum Common Subgraph","publication_year":2026,"publication_date":"2026-05-25","ids":{"openalex":"https://openalex.org/W7167980387","doi":"https://doi.org/10.1109/ets69887.2026.11591580"},"language":null,"primary_location":{"id":"doi:10.1109/ets69887.2026.11591580","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets69887.2026.11591580","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE European Test Symposium (ETS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049430681","display_name":"Paolo Bernardi","orcid":"https://orcid.org/0000-0002-0985-9327"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Paolo Bernardi","raw_affiliation_strings":["Politecnico di Torino,Dip. di Automatica e Informatica,Turin,Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Dip. di Automatica e Informatica,Turin,Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032827585","display_name":"Lorenzo Cardone","orcid":"https://orcid.org/0009-0008-7553-4839"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Lorenzo Cardone","raw_affiliation_strings":["Politecnico di Torino,Dip. di Automatica e Informatica,Turin,Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Dip. di Automatica e Informatica,Turin,Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023997315","display_name":"Stefano Quer","orcid":"https://orcid.org/0000-0001-6835-8277"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Stefano Quer","raw_affiliation_strings":["Politecnico di Torino,Dip. di Automatica e Informatica,Turin,Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Dip. di Automatica e Informatica,Turin,Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.4138000011444092,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.4138000011444092,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.28940001130104065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10720","display_name":"Complexity and Algorithms in Graphs","score":0.03370000049471855,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/network-analysis","display_name":"Network analysis","score":0.3086000084877014},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.2935999929904938},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.2565000057220459},{"id":"https://openalex.org/keywords/upper-and-lower-bounds","display_name":"Upper and lower bounds","score":0.2533999979496002}],"concepts":[{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.48339998722076416},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4571000039577484},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.42089998722076416},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.3391000032424927},{"id":"https://openalex.org/C32946077","wikidata":"https://www.wikidata.org/wiki/Q618079","display_name":"Network analysis","level":2,"score":0.3086000084877014},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.2935999929904938},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.2888999879360199},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2581999897956848},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.2565000057220459},{"id":"https://openalex.org/C77553402","wikidata":"https://www.wikidata.org/wiki/Q13222579","display_name":"Upper and lower bounds","level":2,"score":0.2533999979496002}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ets69887.2026.11591580","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets69887.2026.11591580","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE European Test Symposium (ETS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1974032838","https://openalex.org/W2117654656","https://openalex.org/W2118231264","https://openalex.org/W2134736689","https://openalex.org/W2423531333","https://openalex.org/W2963255460","https://openalex.org/W2966915742","https://openalex.org/W2998336143","https://openalex.org/W4237705776","https://openalex.org/W4280565832","https://openalex.org/W4382239695","https://openalex.org/W4384210225"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2026-07-11T00:00:00"}
