{"id":"https://openalex.org/W3040219174","doi":"https://doi.org/10.1109/ets48528.2020.9131588","title":"On-chip reduced-code static linearity test of $V_{cm}$ -based switching SAR ADCs using an incremental analog-to-digital converter","display_name":"On-chip reduced-code static linearity test of $V_{cm}$ -based switching SAR ADCs using an incremental analog-to-digital converter","publication_year":2020,"publication_date":"2020-05-01","ids":{"openalex":"https://openalex.org/W3040219174","doi":"https://doi.org/10.1109/ets48528.2020.9131588","mag":"3040219174"},"language":"en","primary_location":{"id":"doi:10.1109/ets48528.2020.9131588","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets48528.2020.9131588","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE European Test Symposium (ETS)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hal.science/hal-02899891","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086862836","display_name":"Renato S. Feitoza","orcid":"https://orcid.org/0000-0002-6693-5971"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Renato S. Feitoza","raw_affiliation_strings":["Univ. Grenoble Alpes, CNRS, Grenoble INP*, TIMA, Institute of Engineering Univ. Grenoble Alpes, Grenoble, France","TIMA-RMS - Reliable RF and Mixed-signal Systems (Laboratoire TIMA, 46, avenue F\u00e9lix Viallet - 38031 GRENOBLE Cedex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes, CNRS, Grenoble INP*, TIMA, Institute of Engineering Univ. Grenoble Alpes, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA-RMS - Reliable RF and Mixed-signal Systems (Laboratoire TIMA, 46, avenue F\u00e9lix Viallet - 38031 GRENOBLE Cedex - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085204712","display_name":"Manuel J. Barrag\u00e1n","orcid":"https://orcid.org/0000-0003-0187-604X"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Manuel J. Barragan","raw_affiliation_strings":["Univ. Grenoble Alpes, CNRS, Grenoble INP*, TIMA, Institute of Engineering Univ. Grenoble Alpes, Grenoble, France","TIMA-RMS - Reliable RF and Mixed-signal Systems (Laboratoire TIMA, 46, avenue F\u00e9lix Viallet - 38031 GRENOBLE Cedex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes, CNRS, Grenoble INP*, TIMA, Institute of Engineering Univ. Grenoble Alpes, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA-RMS - Reliable RF and Mixed-signal Systems (Laboratoire TIMA, 46, avenue F\u00e9lix Viallet - 38031 GRENOBLE Cedex - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072282417","display_name":"Antonio Gin\u00e9s","orcid":"https://orcid.org/0000-0001-5272-5802"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio Gines","raw_affiliation_strings":["Instituto de Microelectronica de Sevilla CNM-CSIC, Universidad de Sevilla, Seville, Spain","IMSE-CNM - Instituto de Microelectr\u00f3nica de Sevilla (Seville Institute of Microelectronics \r\nEdificio CICA, Avda Reina Mercedes s/n 41012 Sevilla - Spain)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectronica de Sevilla CNM-CSIC, Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]},{"raw_affiliation_string":"IMSE-CNM - Instituto de Microelectr\u00f3nica de Sevilla (Seville Institute of Microelectronics \r\nEdificio CICA, Avda Reina Mercedes s/n 41012 Sevilla - Spain)","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061963866","display_name":"Salvador Mir","orcid":"https://orcid.org/0000-0001-9911-8946"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Salvador Mir","raw_affiliation_strings":["Univ. Grenoble Alpes, CNRS, Grenoble INP*, TIMA, Institute of Engineering Univ. Grenoble Alpes, Grenoble, France","TIMA-RMS - Reliable RF and Mixed-signal Systems (Laboratoire TIMA, 46, avenue F\u00e9lix Viallet - 38031 GRENOBLE Cedex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes, CNRS, Grenoble INP*, TIMA, Institute of Engineering Univ. Grenoble Alpes, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA-RMS - Reliable RF and Mixed-signal Systems (Laboratoire TIMA, 46, avenue F\u00e9lix Viallet - 38031 GRENOBLE Cedex - France)","institution_ids":["https://openalex.org/I4210087012"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0853,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.38010869,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.8551013469696045},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.6639847755432129},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.6357371807098389},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6198744773864746},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5347005724906921},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4721115827560425},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.4135872423648834},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.23178249597549438},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21243998408317566},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18019062280654907},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08463618159294128},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.06779181957244873}],"concepts":[{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.8551013469696045},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.6639847755432129},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.6357371807098389},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6198744773864746},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5347005724906921},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4721115827560425},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.4135872423648834},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.23178249597549438},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21243998408317566},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18019062280654907},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08463618159294128},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.06779181957244873},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/ets48528.2020.9131588","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets48528.2020.9131588","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE European Test Symposium (ETS)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-02899891v1","is_oa":true,"landing_page_url":"https://hal.science/hal-02899891","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE European Test Symposium (ETS 2020), May 2020, Tallinn, Estonia. &#x27E8;10.1109/ETS48528.2020.9131588&#x27E9;","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:idus.us.es:11441/146829","is_oa":true,"landing_page_url":"https://idus.us.es/handle//11441/146829","pdf_url":null,"source":{"id":"https://openalex.org/S4306401665","display_name":"Deposito de Investigacion Universidad de Sevilla (University of Seville)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79238269","host_organization_name":"Universidad de Sevilla","host_organization_lineage":["https://openalex.org/I79238269"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-02899891v1","is_oa":true,"landing_page_url":"https://hal.science/hal-02899891","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE European Test Symposium (ETS 2020), May 2020, Tallinn, Estonia. &#x27E8;10.1109/ETS48528.2020.9131588&#x27E9;","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1582910515","https://openalex.org/W1930963782","https://openalex.org/W1990158658","https://openalex.org/W2004016279","https://openalex.org/W2111032961","https://openalex.org/W2121273653","https://openalex.org/W2896152049","https://openalex.org/W2954299023","https://openalex.org/W3140546450"],"related_works":["https://openalex.org/W631083485","https://openalex.org/W4313452936","https://openalex.org/W2097026685","https://openalex.org/W2480068220","https://openalex.org/W2070883797","https://openalex.org/W4386859288","https://openalex.org/W2102542442","https://openalex.org/W1986220761","https://openalex.org/W2042495646","https://openalex.org/W2354856110"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,39],"BIST":[4],"technique":[5],"for":[6,28,53],"the":[7,23,29,55,60],"static":[8,64],"linearity":[9,65],"test":[10],"of":[11,25,59],"<tex":[12,30],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[13,31],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$V_{cm}$</tex>":[14,32],"-based":[15,33],"successive-approximation":[16],"analog-to-digital":[17],"converters":[18],"(SAR":[19],"ADCs).":[20],"We":[21],"discuss":[22],"application":[24],"reduced-code":[26,63],"techniques":[27],"SAR":[34],"ADC":[35],"topology":[36],"and":[37,57],"present":[38],"practical":[40],"on-chip":[41,62],"implementation":[42],"based":[43],"on":[44],"an":[45],"embedded":[46],"incremental":[47],"ADC.":[48],"Simulation":[49],"results":[50],"are":[51],"provided":[52],"validating":[54],"feasibility":[56],"performance":[58],"proposed":[61],"test.":[66]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}
