{"id":"https://openalex.org/W2811303036","doi":"https://doi.org/10.1109/ets.2018.8400696","title":"Sense amplifier offset characterisation and test implications for low-voltage SRAMs in 65 nm","display_name":"Sense amplifier offset characterisation and test implications for low-voltage SRAMs in 65 nm","publication_year":2018,"publication_date":"2018-05-01","ids":{"openalex":"https://openalex.org/W2811303036","doi":"https://doi.org/10.1109/ets.2018.8400696","mag":"2811303036"},"language":"en","primary_location":{"id":"doi:10.1109/ets.2018.8400696","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets.2018.8400696","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 23rd European Test Symposium (ETS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019960004","display_name":"Dhruv Patel","orcid":"https://orcid.org/0000-0003-4282-5337"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Dhruv Patel","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Toronto, ON, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055039109","display_name":"Derek Wright","orcid":"https://orcid.org/0000-0003-0411-4497"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Derek Wright","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, ON, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, ON, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086259491","display_name":"Manoj Sachdev","orcid":"https://orcid.org/0000-0002-8256-9828"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Manoj Sachdev","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, ON, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, ON, Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.08664052,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6636767983436584},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.606460690498352},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.578062117099762},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.5644159317016602},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.49633675813674927},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.48663291335105896},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45643675327301025},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4442412257194519},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3894345164299011},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.3744531273841858},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3235681653022766},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.27014821767807007}],"concepts":[{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6636767983436584},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.606460690498352},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.578062117099762},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.5644159317016602},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.49633675813674927},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48663291335105896},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45643675327301025},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4442412257194519},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3894345164299011},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3744531273841858},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3235681653022766},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.27014821767807007},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ets.2018.8400696","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets.2018.8400696","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 23rd European Test Symposium (ETS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7699999809265137,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1536055436","https://openalex.org/W1565820876","https://openalex.org/W1596163276","https://openalex.org/W1966841456","https://openalex.org/W1970484880","https://openalex.org/W1970598944","https://openalex.org/W2028643888","https://openalex.org/W2042308314","https://openalex.org/W2071908165","https://openalex.org/W2095776198","https://openalex.org/W2134049162","https://openalex.org/W2167869933","https://openalex.org/W2506703768","https://openalex.org/W2537147120","https://openalex.org/W2543153005","https://openalex.org/W2545471485","https://openalex.org/W2594464243","https://openalex.org/W2763228497","https://openalex.org/W6633761277","https://openalex.org/W6661375376","https://openalex.org/W6734200190"],"related_works":["https://openalex.org/W3085306935","https://openalex.org/W4388145675","https://openalex.org/W2146647189","https://openalex.org/W1965493748","https://openalex.org/W2806715440","https://openalex.org/W2074628056","https://openalex.org/W2951387119","https://openalex.org/W2913250844","https://openalex.org/W1993302120","https://openalex.org/W2181476449"],"abstract_inverted_index":{"Variability":[0],"in":[1,17],"offset":[2],"voltage,":[3],"bitcell":[4,37],"transistor":[5],"conductance,":[6],"and":[7,14,36,41,57],"leakage":[8],"currents":[9],"can":[10],"lead":[11],"to":[12,60],"marginal":[13,29],"intermittent":[15],"failures":[16,56],"low-voltage":[18],"SRAMs.":[19],"In":[20],"this":[21],"paper,":[22],"we":[23,50],"develop":[24],"a":[25,45],"model":[26],"of":[27,54],"these":[28,55],"faults":[30],"that":[31],"includes":[32],"such":[33],"sense":[34],"amplifier":[35],"variability.":[38],"Using":[39],"simulations":[40],"measurement":[42],"data":[43],"from":[44],"65":[46],"nm":[47],"test":[48],"chip,":[49],"investigate":[51],"the":[52],"likelihood":[53],"propose":[58],"how":[59],"stimulate":[61],"their":[62],"occurrence":[63],"during":[64],"testing.":[65]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}