{"id":"https://openalex.org/W2734491096","doi":"https://doi.org/10.1109/ets.2017.7968241","title":"An efficient test technique to prevent scan-based side-channel attacks","display_name":"An efficient test technique to prevent scan-based side-channel attacks","publication_year":2017,"publication_date":"2017-05-01","ids":{"openalex":"https://openalex.org/W2734491096","doi":"https://doi.org/10.1109/ets.2017.7968241","mag":"2734491096"},"language":"en","primary_location":{"id":"doi:10.1109/ets.2017.7968241","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets.2017.7968241","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 22nd IEEE European Test Symposium (ETS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078604240","display_name":"Satyadev Ahlawat","orcid":"https://orcid.org/0000-0003-0186-1446"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Satyadev Ahlawat","raw_affiliation_strings":["Indian Institute of Technology Bombay, Mumbai, Maharashtra, IN"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bombay, Mumbai, Maharashtra, IN","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010761729","display_name":"Darshit Vaghani","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Darshit Vaghani","raw_affiliation_strings":["Dept. of Electrical Engineering, Indian Institute of Technology, Bombay, India"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering, Indian Institute of Technology, Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073587430","display_name":"Virendra Singh","orcid":"https://orcid.org/0000-0002-7035-7844"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Virendra Singh","raw_affiliation_strings":["Dept. of Electrical Engineering, Indian Institute of Technology, Bombay, India"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering, Indian Institute of Technology, Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5078604240"],"corresponding_institution_ids":["https://openalex.org/I162827531"],"apc_list":null,"apc_paid":null,"fwci":1.1582,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.79332715,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.7902373671531677},{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.7831714153289795},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.7258192896842957},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6743831038475037},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.6710269451141357},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.6074739694595337},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.5800628662109375},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5637915134429932},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5451736450195312},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.521088719367981},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4722544550895691},{"id":"https://openalex.org/keywords/observability","display_name":"Observability","score":0.47123321890830994},{"id":"https://openalex.org/keywords/controllability","display_name":"Controllability","score":0.4380725622177124},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.4284970462322235},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4209068715572357},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.23197171092033386},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1799737513065338},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.1658661961555481},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.14095094799995422},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.1328275203704834}],"concepts":[{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.7902373671531677},{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.7831714153289795},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.7258192896842957},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6743831038475037},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.6710269451141357},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.6074739694595337},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.5800628662109375},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5637915134429932},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5451736450195312},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.521088719367981},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4722544550895691},{"id":"https://openalex.org/C36299963","wikidata":"https://www.wikidata.org/wiki/Q1369844","display_name":"Observability","level":2,"score":0.47123321890830994},{"id":"https://openalex.org/C48209547","wikidata":"https://www.wikidata.org/wiki/Q1331104","display_name":"Controllability","level":2,"score":0.4380725622177124},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.4284970462322235},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4209068715572357},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.23197171092033386},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1799737513065338},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.1658661961555481},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.14095094799995422},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.1328275203704834},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C28826006","wikidata":"https://www.wikidata.org/wiki/Q33521","display_name":"Applied mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ets.2017.7968241","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ets.2017.7968241","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 22nd IEEE European Test Symposium (ETS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1982643606","https://openalex.org/W2025669099","https://openalex.org/W2048183989","https://openalex.org/W2103468612","https://openalex.org/W2142537526","https://openalex.org/W2537675134","https://openalex.org/W4232599178","https://openalex.org/W6656822978"],"related_works":["https://openalex.org/W4386374027","https://openalex.org/W1581610324","https://openalex.org/W2129124567","https://openalex.org/W2167571917","https://openalex.org/W3088373974","https://openalex.org/W2620614665","https://openalex.org/W2146547687","https://openalex.org/W2049913894","https://openalex.org/W2061168866","https://openalex.org/W2801332551"],"abstract_inverted_index":{"Almost":[0],"every":[1,16],"complex":[2],"circuit":[3],"today":[4],"employs":[5],"scan-based":[6,141],"Design-for-Testability":[7],"(DFT)":[8],"architecture":[9,61],"to":[10,33,37,73],"enhance":[11],"controllability":[12],"and":[13,124,134],"observability":[14],"for":[15],"flip-flop":[17],"in":[18,43],"the":[19,23,26,39,64,68,82,90,95,103],"design,":[20],"thereby":[21],"improve":[22],"testability.":[24],"However,":[25],"DFT":[27],"structure":[28],"can":[29],"also":[30,88],"be":[31],"exploited":[32],"mount":[34],"side-channel":[35],"attacks":[36],"retrieve":[38],"secret":[40],"key":[41,66,78],"stored":[42],"a":[44,56],"cryptographic":[45,69],"chip,":[46],"thus":[47],"compromising":[48],"its":[49],"security.":[50],"In":[51],"this":[52],"paper,":[53],"we":[54],"propose":[55],"new":[57],"secure":[58,111],"scan":[59,84,98,104,112],"test":[60,74,85,105,113],"which":[62],"isolates":[63],"encryption":[65,77],"whenever":[67],"chip":[70],"is":[71,107,115,136],"switched":[72],"mode.":[75],"The":[76,109,127],"remains":[79],"isolated":[80],"during":[81],"whole":[83],"process.":[86],"It":[87],"clears":[89],"last":[91],"functional":[92],"states":[93],"of":[94,117,121,138],"security":[96],"sensitive":[97],"cells":[99],"as":[100,102],"soon":[101],"mode":[106],"activated.":[108],"proposed":[110,128],"approach":[114,129],"capable":[116,137],"exercising":[118],"all":[119],"kinds":[120],"conventional":[122],"stuck-at":[123],"timing":[125],"test.":[126],"has":[130],"minimal":[131],"hardware":[132],"overhead":[133],"it":[135],"preventing":[139],"existing":[140],"side":[142],"channel":[143],"attacks.":[144]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1}],"updated_date":"2026-03-25T13:04:00.132906","created_date":"2025-10-10T00:00:00"}