{"id":"https://openalex.org/W1592052747","doi":"https://doi.org/10.1109/estmed.2004.1359713","title":"A hardware accelerator IP for EBCOT Tier-1 coding in JPEG2000 Standard","display_name":"A hardware accelerator IP for EBCOT Tier-1 coding in JPEG2000 Standard","publication_year":2004,"publication_date":"2004-12-23","ids":{"openalex":"https://openalex.org/W1592052747","doi":"https://doi.org/10.1109/estmed.2004.1359713","mag":"1592052747"},"language":"en","primary_location":{"id":"doi:10.1109/estmed.2004.1359713","is_oa":false,"landing_page_url":"https://doi.org/10.1109/estmed.2004.1359713","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2nd Workshop onEmbedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006660611","display_name":"Tien-Wei Hsieh","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Tien-Wei Hsieh","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","Department of Computer Science National Tsing Hua University, Hsin-Chu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science National Tsing Hua University, Hsin-Chu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100883364","display_name":"Youn-Long Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Youn-Long Lin","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","Department of Computer Science National Tsing Hua University, Hsin-Chu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science National Tsing Hua University, Hsin-Chu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5006660611"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.07829665,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"5","issue":null,"first_page":"87","last_page":"90"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9865999817848206,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7738929390907288},{"id":"https://openalex.org/keywords/jpeg-2000","display_name":"JPEG 2000","score":0.7093188762664795},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6693415641784668},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6186890602111816},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5032235980033875},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.4834338426589966},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4824119806289673},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4792223572731018},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.45526790618896484},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4019789397716522},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37550899386405945},{"id":"https://openalex.org/keywords/image-compression","display_name":"Image compression","score":0.20081913471221924},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10123839974403381},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.08143237233161926}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7738929390907288},{"id":"https://openalex.org/C69216139","wikidata":"https://www.wikidata.org/wiki/Q931783","display_name":"JPEG 2000","level":5,"score":0.7093188762664795},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6693415641784668},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6186890602111816},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5032235980033875},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.4834338426589966},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4824119806289673},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4792223572731018},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.45526790618896484},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4019789397716522},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37550899386405945},{"id":"https://openalex.org/C13481523","wikidata":"https://www.wikidata.org/wiki/Q412438","display_name":"Image compression","level":4,"score":0.20081913471221924},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10123839974403381},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.08143237233161926},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/estmed.2004.1359713","is_oa":false,"landing_page_url":"https://doi.org/10.1109/estmed.2004.1359713","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2nd Workshop onEmbedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.219.7105","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.219.7105","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.nthu.edu.tw/~ylin/publication_files/EBCOT%20Estimedia%20Ver%201.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1850939858","https://openalex.org/W1904135398","https://openalex.org/W2066437933","https://openalex.org/W2167120242"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2388592834","https://openalex.org/W2357444361","https://openalex.org/W2532502681","https://openalex.org/W3094476157","https://openalex.org/W1557356640"],"abstract_inverted_index":{"We":[0,58,94],"propose":[1],"a":[2,46,53,85],"hardware":[3],"accelerator":[4],"IP":[5],"for":[6,30,107],"the":[7,20,68,72,80,90,97],"Tier-1":[8,28],"portion":[9],"of":[10,34,45,67,79,89],"Embedded":[11],"Block":[12],"Coding":[13],"with":[14,71,103],"Optimal":[15],"Truncation":[16],"(EBCOT)":[17],"used":[18],"in":[19,99],"JPEG2000":[21],"next":[22],"generation":[23],"image":[24],"compression":[25],"standard.":[26],"EBCOT":[27],"accounts":[29],"more":[31],"than":[32],"70%":[33],"encoding":[35],"time":[36],"due":[37],"to":[38],"extensive":[39],"bit-level":[40],"processing.":[41],"Our":[42],"architecture":[43],"consists":[44],"16-way":[47],"parallel":[48],"context":[49],"formation":[50],"module":[51],"and":[52,83,116],"3-stage":[54],"pipelined":[55],"arithmetic":[56],"encoder.":[57],"reduce":[59,77],"power":[60],"consumption":[61],"by":[62],"properly":[63],"shutting":[64],"down":[65],"parts":[66],"circuit.":[69],"Compared":[70],"known":[73],"best":[74],"design,":[75],"we":[76],"17%":[78],"cycle":[81],"count":[82],"reach":[84],"level":[86],"within":[87],"5%":[88],"theoretical":[91],"lower":[92],"bound.":[93],"have":[95],"implemented":[96],"design":[98],"synthesizable":[100],"Verilog":[101],"RTL":[102],"an":[104],"AMBA-AHB":[105],"interface":[106],"SOC":[108],"design.":[109],"FPGA":[110],"prototyping":[111],"has":[112],"been":[113],"successfully":[114],"demonstrated":[115],"substantial":[117],"speedup":[118],"achieved.":[119]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
