{"id":"https://openalex.org/W4387250951","doi":"https://doi.org/10.1109/essderc59256.2023.10268558","title":"Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs","display_name":"Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs","publication_year":2023,"publication_date":"2023-09-11","ids":{"openalex":"https://openalex.org/W4387250951","doi":"https://doi.org/10.1109/essderc59256.2023.10268558"},"language":"en","primary_location":{"id":"doi:10.1109/essderc59256.2023.10268558","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc59256.2023.10268558","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103077807","display_name":"Po\u2010Chih Chen","orcid":"https://orcid.org/0009-0009-0061-5172"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Po-Chih Chen","raw_affiliation_strings":["National Cheng Kung University,Department of Electrical Engineering,Tainan,Taiwan","Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"National Cheng Kung University,Department of Electrical Engineering,Tainan,Taiwan","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051942589","display_name":"Yi-Ting Wu","orcid":"https://orcid.org/0000-0001-9497-6773"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yi-Ting Wu","raw_affiliation_strings":["Intel Corporation,Logic Technology Development,Hillsboro,Oregon,United States","Logic Technology Development, Intel Corporation, Hillsboro, Oregon, United States"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development,Hillsboro,Oregon,United States","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, Oregon, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085545279","display_name":"Meng\u2010Hsueh Chiang","orcid":"https://orcid.org/0000-0003-4789-6302"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Meng-Hsueh Chiang","raw_affiliation_strings":["National Cheng Kung University,Department of Electrical Engineering,Tainan,Taiwan","Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"National Cheng Kung University,Department of Electrical Engineering,Tainan,Taiwan","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5103077807"],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":null,"apc_paid":null,"fwci":0.1337,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.44954264,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"73","last_page":"76"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8370819687843323},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.7048236131668091},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6744241714477539},{"id":"https://openalex.org/keywords/nanosheet","display_name":"Nanosheet","score":0.5871018171310425},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5250115990638733},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.4704384207725525},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4163590371608734},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.41048118472099304},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.4007294476032257},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3682199716567993},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23052740097045898},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.2039947807788849},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15879401564598083}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8370819687843323},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.7048236131668091},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6744241714477539},{"id":"https://openalex.org/C51967427","wikidata":"https://www.wikidata.org/wiki/Q17148232","display_name":"Nanosheet","level":2,"score":0.5871018171310425},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5250115990638733},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.4704384207725525},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4163590371608734},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41048118472099304},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.4007294476032257},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3682199716567993},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23052740097045898},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.2039947807788849},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15879401564598083}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/essderc59256.2023.10268558","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc59256.2023.10268558","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.699999988079071,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309618","display_name":"Ministry of Science and Technology","ror":"https://ror.org/02b207r52"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2046649032","https://openalex.org/W2744406216","https://openalex.org/W2785923734","https://openalex.org/W3048848924","https://openalex.org/W3127483746","https://openalex.org/W3212740006","https://openalex.org/W4213422557","https://openalex.org/W4214569831","https://openalex.org/W4285221979"],"related_works":["https://openalex.org/W2326188151","https://openalex.org/W2031432268","https://openalex.org/W2042526628","https://openalex.org/W2386361943","https://openalex.org/W2149895879","https://openalex.org/W4250300609","https://openalex.org/W2010357007","https://openalex.org/W2765340795","https://openalex.org/W2545707786","https://openalex.org/W2133198051"],"abstract_inverted_index":{"This":[0],"study":[1],"compares":[2],"six-transistor":[3],"(6T)":[4],"static":[5,90],"random":[6],"access":[7,183],"memory":[8],"(SRAM)":[9],"implemented":[10],"with":[11],"state-of-the-art":[12],"bulk":[13,154,195],"FinFETs":[14],"and":[15,39,73,88,94,112,119,124],"silicon-on-insulator":[16],"(SOI)":[17],"gate-all-around":[18],"nanosheet":[19],"transistors":[20,83],"(NSFETs)":[21],"for":[22],"G40M16/T2":[23],"(2":[24],"nm)":[25],"process":[26],"node.":[27],"Compared":[28],"to":[29,76,175,203],"the":[30,57,77,102,116,131,135,139,158,161,164,176,181,194,204],"FinFET":[31,126,196],"6T":[32],"SRAM":[33,61,187,197],"whose":[34],"pull-up":[35],"(PU),":[36],"pass-gate":[37],"(PG),":[38],"pull-down":[40],"(PD)":[41],"transistor":[42],"footprint":[43],"(device":[44],"layout":[45],"width)":[46],"ratio":[47],"can":[48,62,67,142],"only":[49],"be":[50,63,68],"either":[51],"PU:PG:PD":[52,58,98],"=":[53,99,104,106],"1:1:2":[54,123],"or":[55],"1:2:2,":[56],"of":[59,81,122,138,153,160,185,193],"NSFET":[60,141,186],"1:\u03b1:2,":[64],"where":[65,101],"\u03b1":[66],"any":[69],"number":[70],"between":[71],"1":[72],"2":[74],"owing":[75,202],"adjustable":[78],"channel":[79],"widths":[80],"PG":[82],".":[84],"The":[85],"optimal":[86],"read":[87],"write":[89],"noise":[91],"margin":[92],"(RSNM":[93],"WSNM)":[95],"design":[96,201],"is":[97,110,148,188],"1:1.458:2,":[100],"RSNM":[103,118],"WSNM":[105,120],"171":[107],"mV,":[108],"which":[109,157,171],"14%":[111],"51%":[113],"higher":[114,150,205],"than":[115,151,191],"minimum":[117],"values":[121],"1:2:2":[125,200],"SRAMs":[127],"respectively.":[128],"Moreover,":[129],"because":[130],"entire":[132],"device":[133,162],"above":[134,163],"SOI":[136,140],"substrate":[137,166],"conduct":[143],"current,":[144],"its":[145],"drive":[146,206],"current":[147],"109%":[149],"that":[152,192],"FinFET,":[155],"in":[156],"part":[159],"silicon":[165],"forms":[167],"a":[168,199],"punch-through":[169],"stopper,":[170],"does":[172],"not":[173],"contribute":[174],"conductive":[177],"current.":[178,207],"In":[179],"addition,":[180],"read/write":[182],"time":[184],"49%/7%":[189],"faster":[190],"under":[198]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}