{"id":"https://openalex.org/W4237869567","doi":"https://doi.org/10.1109/essderc53440.2021.9631785","title":"A Zero-Skipping Reconfigurable SRAM In-Memory Computing Macro with Binary-Searching ADC","display_name":"A Zero-Skipping Reconfigurable SRAM In-Memory Computing Macro with Binary-Searching ADC","publication_year":2021,"publication_date":"2021-09-13","ids":{"openalex":"https://openalex.org/W4237869567","doi":"https://doi.org/10.1109/essderc53440.2021.9631785"},"language":"en","primary_location":{"id":"doi:10.1109/essderc53440.2021.9631785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc53440.2021.9631785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003541204","display_name":"Chengshuo Yu","orcid":"https://orcid.org/0000-0003-0897-7871"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]},{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Chengshuo Yu","raw_affiliation_strings":["Institute of Microelectronics, A*STAR, Singapore","School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, A*STAR, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I115228651"]},{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065841007","display_name":"Kevin Tshun Chuan Chai","orcid":"https://orcid.org/0000-0001-6624-8912"},"institutions":[{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]},{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kevin Tshun Chuan Chai","raw_affiliation_strings":["Institute of Microelectronics, A*STAR, Singapore"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, A*STAR, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I115228651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076628109","display_name":"Tony Tae-Hyoung Kim","orcid":"https://orcid.org/0000-0002-1779-1799"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Tony Tae-Hyoung Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035469250","display_name":"Bongjin Kim","orcid":"https://orcid.org/0000-0001-5397-9628"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bongjin Kim","raw_affiliation_strings":["Univerity of California, Santa Barbara, California, United States"],"affiliations":[{"raw_affiliation_string":"Univerity of California, Santa Barbara, California, United States","institution_ids":["https://openalex.org/I154570441"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5003541204"],"corresponding_institution_ids":["https://openalex.org/I115228651","https://openalex.org/I172675005","https://openalex.org/I4210090209"],"apc_list":null,"apc_paid":null,"fwci":0.7019,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.70503653,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"131","last_page":"134"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7071120738983154},{"id":"https://openalex.org/keywords/column","display_name":"Column (typography)","score":0.6658902168273926},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.6431629657745361},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5764183402061462},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5172132253646851},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.47849196195602417},{"id":"https://openalex.org/keywords/dot-product","display_name":"Dot product","score":0.4710761606693268},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4512091279029846},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3263653516769409},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3227715492248535},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.19712761044502258},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1480286717414856},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09805449843406677}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7071120738983154},{"id":"https://openalex.org/C2780551164","wikidata":"https://www.wikidata.org/wiki/Q2306599","display_name":"Column (typography)","level":3,"score":0.6658902168273926},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.6431629657745361},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5764183402061462},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5172132253646851},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.47849196195602417},{"id":"https://openalex.org/C32900221","wikidata":"https://www.wikidata.org/wiki/Q181365","display_name":"Dot product","level":2,"score":0.4710761606693268},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4512091279029846},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3263653516769409},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3227715492248535},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.19712761044502258},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1480286717414856},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09805449843406677},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/essderc53440.2021.9631785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc53440.2021.9631785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2966285227","https://openalex.org/W3015432327","https://openalex.org/W3017968097","https://openalex.org/W3128966520"],"related_works":["https://openalex.org/W2030816003","https://openalex.org/W4239992647","https://openalex.org/W2150013480","https://openalex.org/W1554458299","https://openalex.org/W2076325756","https://openalex.org/W81423522","https://openalex.org/W1509860481","https://openalex.org/W3151633427","https://openalex.org/W2488264085","https://openalex.org/W2119025037"],"abstract_inverted_index":{"This":[0],"work":[1],"proposes":[2],"a":[3,14,31,127,168],"reconfigurable":[4,32,69],"SRAM":[5],"in-memory":[6],"computing":[7,40],"macro":[8],"for":[9,45,62,82,86,91,96,142],"processing":[10],"neural":[11],"networks":[12],"using":[13,151,178],"pair":[15],"of":[16,79,167],"7T":[17,22,57],"bitcells.":[18,146],"The":[19,94,117,164],"proposed":[20,155],"dual":[21,56],"bitcell":[23,58,156],"structure":[24],"decouples":[25],"the":[26,63,97,135,140,143,154],"read":[27],"operation":[28,172],"and":[29,48,73,88,153,182],"offers":[30],"weight":[33,177],"precision":[34,70],"(3\u201315":[35],"levels).":[36],"It":[37],"also":[38],"saves":[39],"energy":[41,165],"by":[42,132],"skipping":[43],"zeros":[44],"both":[46],"weights":[47,71],"input":[49],"activations.":[50],"A":[51,76,147],"<tex":[52],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[53,161],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$528\\times":[54],"128$</tex>":[55],"array":[59,157],"is":[60,149,173],"constructed":[61],"massively":[64],"parallel":[65],"128":[66],"dot-products":[67],"between":[68],"(1.6\u20133.9bit)":[72],"binary":[74,99],"inputs.":[75],"column":[77,118],"consists":[78],"384":[80],"bitcells":[81,85,90,95,110],"dot-products,":[83],"96":[84,144],"ADC,":[87],"48":[89,109],"offset":[92],"calibration.":[93],"column-by-column":[98],"searching":[100],"ADC":[101,119],"are":[102],"divided":[103],"into":[104,126],"two":[105],"groups,":[106],"each":[107],"with":[108],"having":[111],"fixed":[112],"\u2018+1\u2019":[113],"or":[114],"\u2018\u22121\u2019":[115],"weight.":[116],"then":[120],"converts":[121],"an":[122],"analog":[123],"dot-product":[124],"result":[125],"5-7bit":[128],"digital":[129],"output":[130],"code":[131],"dynamically":[133],"changing":[134],"reference":[136],"level":[137],"through":[138],"controlling":[139],"inputs":[141],"replica":[145],"test-chip":[148],"fabricated":[150],"65nm":[152],"occupies":[158],"0.378mm":[159],"<sup":[160],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[162],".":[163],"efficiency":[166],"unit":[169],"multiply-and-accumulate":[170],"(MAC)":[171],"258.5/67.9/23.9TOPS/W":[174],"at":[175],"1.6/2.8/3.9bit":[176],"0.45/0.8V":[179],"supply":[180],"voltages":[181],"200MHz":[183],"operating":[184],"clock":[185],"frequency.":[186]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}