{"id":"https://openalex.org/W2021032428","doi":"https://doi.org/10.1109/essderc.2012.6343341","title":"CMOS compatible ALD high-k double slot grating couplers for on-chip optical interconnects","display_name":"CMOS compatible ALD high-k double slot grating couplers for on-chip optical interconnects","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2021032428","doi":"https://doi.org/10.1109/essderc.2012.6343341","mag":"2021032428"},"language":"en","primary_location":{"id":"doi:10.1109/essderc.2012.6343341","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc.2012.6343341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035139888","display_name":"Maziar M. Naiini","orcid":null},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":true,"raw_author_name":"Maziar M. Naiini","raw_affiliation_strings":["Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden"],"affiliations":[{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012087886","display_name":"Christoph Henkel","orcid":"https://orcid.org/0000-0002-1295-7489"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Christoph Henkel","raw_affiliation_strings":["Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden"],"affiliations":[{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057229577","display_name":"Gunnar Malm","orcid":null},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Gunnar B. Malm","raw_affiliation_strings":["Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden"],"affiliations":[{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059858621","display_name":"Mikael \u00d6stling","orcid":"https://orcid.org/0000-0002-5845-3032"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Mikael Ostling","raw_affiliation_strings":["Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden"],"affiliations":[{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"Integrated Devices and Circuits, School of Information and Communication Technology, KTH Royal Institute of Technology, P.O. Box 229, SE-16440 Kista, Sweden","institution_ids":["https://openalex.org/I86987016"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5035139888"],"corresponding_institution_ids":["https://openalex.org/I86987016"],"apc_list":null,"apc_paid":null,"fwci":0.2455,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58403885,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"8265","issue":null,"first_page":"93","last_page":"96"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11723","display_name":"Optical Coatings and Gratings","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2508","display_name":"Surfaces, Coatings and Films"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.8074473142623901},{"id":"https://openalex.org/keywords/grating","display_name":"Grating","score":0.7479771375656128},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.7201905250549316},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.6963292956352234},{"id":"https://openalex.org/keywords/cladding","display_name":"Cladding (metalworking)","score":0.5855457782745361},{"id":"https://openalex.org/keywords/etching","display_name":"Etching (microfabrication)","score":0.5149324536323547},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4830680191516876},{"id":"https://openalex.org/keywords/atomic-layer-deposition","display_name":"Atomic layer deposition","score":0.46387895941734314},{"id":"https://openalex.org/keywords/waveguide","display_name":"Waveguide","score":0.46364179253578186},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.4521326422691345},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43558239936828613},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.36608654260635376},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.34550178050994873},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13188764452934265},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.13109195232391357}],"concepts":[{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.8074473142623901},{"id":"https://openalex.org/C2777813233","wikidata":"https://www.wikidata.org/wiki/Q1527816","display_name":"Grating","level":2,"score":0.7479771375656128},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.7201905250549316},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.6963292956352234},{"id":"https://openalex.org/C36456112","wikidata":"https://www.wikidata.org/wiki/Q288064","display_name":"Cladding (metalworking)","level":2,"score":0.5855457782745361},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.5149324536323547},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4830680191516876},{"id":"https://openalex.org/C69544855","wikidata":"https://www.wikidata.org/wiki/Q757625","display_name":"Atomic layer deposition","level":3,"score":0.46387895941734314},{"id":"https://openalex.org/C200687136","wikidata":"https://www.wikidata.org/wiki/Q11233438","display_name":"Waveguide","level":2,"score":0.46364179253578186},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.4521326422691345},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43558239936828613},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.36608654260635376},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.34550178050994873},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13188764452934265},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.13109195232391357},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/essderc.2012.6343341","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc.2012.6343341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6100000143051147}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1980223341","https://openalex.org/W1985972755","https://openalex.org/W1994315345","https://openalex.org/W1999705713","https://openalex.org/W2014714329","https://openalex.org/W2033242105","https://openalex.org/W2048210943","https://openalex.org/W2050429725","https://openalex.org/W2091313523","https://openalex.org/W2092525004","https://openalex.org/W2094273008","https://openalex.org/W2108985005","https://openalex.org/W2135098631","https://openalex.org/W2138670269","https://openalex.org/W2151499257"],"related_works":["https://openalex.org/W2017189043","https://openalex.org/W2104300577","https://openalex.org/W2045648267","https://openalex.org/W1998534931","https://openalex.org/W4206445530","https://openalex.org/W4248115860","https://openalex.org/W4304136734","https://openalex.org/W2612856585","https://openalex.org/W2771786520","https://openalex.org/W2092690658"],"abstract_inverted_index":{"Silicon-on-insulator(SOI)":[0],"novel":[1],"on-chip":[2],"grating":[3,23,87],"couplers":[4,24,88],"for":[5,27],"double":[6],"slot":[7,44],"high-k":[8,50],"waveguides":[9],"are":[10],"experimentally":[11],"demonstrated.":[12],"The":[13,22,49,86],"devices":[14],"were":[15,25,52],"fabricated":[16],"with":[17],"standard":[18],"CMOS":[19],"process":[20,63],"technology.":[21],"designed":[26],"the":[28,32,43,47,55,68,71,76,82],"best":[29],"performance":[30],"at":[31,95],"C-band":[33],"communication":[34],"range.":[35],"Two":[36],"thin":[37],"layers":[38,51],"of":[39,46,75,93],"aluminum":[40],"oxide":[41,78],"formed":[42],"region":[45],"waveguide.":[48],"deposited":[53],"using":[54],"atomic":[56],"layer":[57,80],"deposition":[58],"(ALD)":[59],"method.":[60],"A":[61],"reliable":[62],"was":[64,84],"realized":[65],"by":[66,106],"etching":[67],"structures":[69],"to":[70,102],"buried":[72],"oxide.":[73],"Effect":[74],"top":[77],"cladding":[79],"on":[81],"efficiency":[83,92,99],"studied.":[85],"had":[89],"a":[90],"measured":[91],"22%":[94],"1.55\u03bcm":[96],"wavelength.":[97],"This":[98],"is":[100],"competitive":[101],"other":[103,107],"results":[104],"reported":[105],"groups.":[108]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}