{"id":"https://openalex.org/W4387411166","doi":"https://doi.org/10.1109/esscirc59616.2023.10268692","title":"A 13.2fJ/step 74.3-dB SNDR Pipelined Noise-shaping SAR+VCO ADC","display_name":"A 13.2fJ/step 74.3-dB SNDR Pipelined Noise-shaping SAR+VCO ADC","publication_year":2023,"publication_date":"2023-09-11","ids":{"openalex":"https://openalex.org/W4387411166","doi":"https://doi.org/10.1109/esscirc59616.2023.10268692"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc59616.2023.10268692","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/esscirc59616.2023.10268692","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086741246","display_name":"Sumukh Prashant Bhanushali","orcid":"https://orcid.org/0000-0001-7463-2949"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sumukh Prashant Bhanushali","raw_affiliation_strings":["Arizona State University,School of Elecmcal, Computer and Energy Engineering,AZ,USA","School of Elecmcal, Computer and Energy Engineering, Arizona State University, AZ, USA"],"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Elecmcal, Computer and Energy Engineering,AZ,USA","institution_ids":["https://openalex.org/I55732556"]},{"raw_affiliation_string":"School of Elecmcal, Computer and Energy Engineering, Arizona State University, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005496543","display_name":"Arindam Sanyal","orcid":"https://orcid.org/0000-0003-4045-6291"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arindam Sanyal","raw_affiliation_strings":["Arizona State University,School of Elecmcal, Computer and Energy Engineering,AZ,USA","School of Elecmcal, Computer and Energy Engineering, Arizona State University, AZ, USA"],"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Elecmcal, Computer and Energy Engineering,AZ,USA","institution_ids":["https://openalex.org/I55732556"]},{"raw_affiliation_string":"School of Elecmcal, Computer and Energy Engineering, Arizona State University, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5086741246"],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":0.1126,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.41179507,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"55","issue":null,"first_page":"285","last_page":"288"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.9353100061416626},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.8823225498199463},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.769698977470398},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7480072975158691},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.6693682074546814},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5587552189826965},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5563452243804932},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5292255878448486},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5099912881851196},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2683281898498535},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2609454393386841},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23803728818893433}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.9353100061416626},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.8823225498199463},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.769698977470398},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7480072975158691},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.6693682074546814},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5587552189826965},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5563452243804932},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5292255878448486},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5099912881851196},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2683281898498535},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2609454393386841},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23803728818893433}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc59616.2023.10268692","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/esscirc59616.2023.10268692","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W3015386793","https://openalex.org/W3210271453","https://openalex.org/W4220901088","https://openalex.org/W4286571712"],"related_works":["https://openalex.org/W2759515872","https://openalex.org/W4206356469","https://openalex.org/W2904640696","https://openalex.org/W2511822798","https://openalex.org/W2341231357","https://openalex.org/W4390693196","https://openalex.org/W2542593952","https://openalex.org/W2207354743","https://openalex.org/W2914701507","https://openalex.org/W2416586275"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"an":[3],"OTA-free":[4],"pipelined":[5],"passive":[6,103],"noise-shaping":[7],"SAR":[8],"(NS-SAR)":[9],"+":[10],"VCO":[11,41,44,52,83],"ADC":[12,63,95],"that":[13],"offers":[14],"high":[15],"resolution":[16],"(>12-bit)":[17],"with":[18,34,113],"only":[19],"a":[20,73],"5-bit":[21],"NS-SAR":[22,39,104],"stage":[23,42],"and":[24,40,55,59,81,109],"$":[25],"4-36\\times$":[26],"lower":[27],"sampling":[28],"capacitor":[29],"compared":[30],"to":[31,77],"state-of-the-art":[32,102],"NS-SARs":[33],"similar":[35,107],"ENOB.":[36],"Pipelining":[37],"the":[38,51,87,93,97],"linearizes":[43],"by":[45,64],"reducing":[46],"its":[47,56],"input":[48],"swing,":[49],"increases":[50],"integration":[53],"time":[54],"energy":[57],"efficiency,":[58],"improves":[60],"SFDR":[61],"of":[62,68,115,122],"suppressing":[65],"frequency":[66],"dependency":[67],"interstage":[69,79],"gain.":[70],"We":[71],"demonstrate":[72],"simple":[74],"calibration":[75],"technique":[76],"extract":[78],"gain":[80,84],"track":[82],"accurately":[85],"in":[86,90,106],"background.":[88],"Fabricated":[89],"65nm":[91],"CMOS,":[92],"prototype":[94],"achieves":[96],"best":[98],"Walden":[99],"FoM":[100],"among":[101],"ADCs":[105],"technology":[108],"consumes":[110],"0.":[111],"12mW":[112],"SNDR/SFDR":[114],"74.3/S9.ldB":[116],"at":[117],"13.":[118],"2fJ/step":[119],"for":[120],"OSR":[121],"9.":[123]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2025-12-25T23:11:45.687758","created_date":"2025-10-10T00:00:00"}
