{"id":"https://openalex.org/W4308089795","doi":"https://doi.org/10.1109/esscirc55480.2022.9911301","title":"A 5.4-mW 50-MHz 29.3-dBm-IIP3 Fourth-Order Low-Pass Filter","display_name":"A 5.4-mW 50-MHz 29.3-dBm-IIP3 Fourth-Order Low-Pass Filter","publication_year":2022,"publication_date":"2022-09-19","ids":{"openalex":"https://openalex.org/W4308089795","doi":"https://doi.org/10.1109/esscirc55480.2022.9911301"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc55480.2022.9911301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc55480.2022.9911301","pdf_url":null,"source":{"id":"https://openalex.org/S4363608323","display_name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023180065","display_name":"Liangbo Lei","orcid":"https://orcid.org/0009-0002-0675-4711"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liangbo Lei","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051368557","display_name":"Cong Tao","orcid":"https://orcid.org/0000-0001-7402-1427"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Cong Tao","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100325084","display_name":"Zhipeng Chen","orcid":"https://orcid.org/0000-0002-8330-0070"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhipeng Chen","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082092557","display_name":"Zhiliang Hong","orcid":"https://orcid.org/0000-0002-9968-5964"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiliang Hong","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101872560","display_name":"Yumei Huang","orcid":"https://orcid.org/0009-0009-6376-5362"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yumei Huang","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.9165,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.86905655,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"477","last_page":"480"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/digital-biquad-filter","display_name":"Digital biquad filter","score":0.7480119466781616},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.6968134641647339},{"id":"https://openalex.org/keywords/analogue-filter","display_name":"Analogue filter","score":0.5190473198890686},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5044697523117065},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4755097031593323},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.46993571519851685},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.42978808283805847},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.41775691509246826},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4103141129016876},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39947599172592163},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.38585251569747925},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.36362195014953613},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3634231686592102},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.3479602336883545},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23966357111930847},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.19568052887916565},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.1079329252243042}],"concepts":[{"id":"https://openalex.org/C14455310","wikidata":"https://www.wikidata.org/wiki/Q5276043","display_name":"Digital biquad filter","level":4,"score":0.7480119466781616},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.6968134641647339},{"id":"https://openalex.org/C176046018","wikidata":"https://www.wikidata.org/wiki/Q359205","display_name":"Analogue filter","level":4,"score":0.5190473198890686},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5044697523117065},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4755097031593323},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.46993571519851685},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.42978808283805847},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.41775691509246826},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4103141129016876},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39947599172592163},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.38585251569747925},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.36362195014953613},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3634231686592102},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.3479602336883545},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23966357111930847},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.19568052887916565},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.1079329252243042}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc55480.2022.9911301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc55480.2022.9911301","pdf_url":null,"source":{"id":"https://openalex.org/S4363608323","display_name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1995414574","https://openalex.org/W2008313685","https://openalex.org/W2092704120","https://openalex.org/W2097055154","https://openalex.org/W2130061011","https://openalex.org/W2160672717","https://openalex.org/W2610244659","https://openalex.org/W2790891514","https://openalex.org/W3042423334","https://openalex.org/W3209126564"],"related_works":["https://openalex.org/W2162104246","https://openalex.org/W2086223105","https://openalex.org/W2113397720","https://openalex.org/W2049560359","https://openalex.org/W1979000974","https://openalex.org/W2046739132","https://openalex.org/W2118322026","https://openalex.org/W3000365547","https://openalex.org/W2188113371","https://openalex.org/W1967543370"],"abstract_inverted_index":{"This":[0,102],"paper":[1],"presents":[2],"a":[3,98],"continuous-time":[4],"4":[5],"<sup":[6,127],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[7,128],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">th</sup>":[8],"-order":[9],"low-pass":[10],"filter":[11,22,103,112],"with":[12],"50MHz":[13],"cut-off":[14],"frequency.":[15],"The":[16,52,73,88,95,111,121],"proposed":[17],"two-stage":[18],"opamps":[19],"in":[20,56,117],"the":[21,29,50,57,64,68,78,82,86,131,136],"use":[23],"push-pull":[24],"output":[25,58,90],"stage":[26,59],"to":[27],"enhance":[28],"in-band":[30,89],"linearity.":[31],"High":[32],"linearity":[33],"of":[34,49,67,77,85,125,135],"+29.3dBm":[35],"IIP3":[36],"is":[37,44,60,93,100],"achieved":[38,122],"at":[39],"30MHz.":[40],"Simple":[41],"R-C":[42,53],"compensation":[43,54],"adopted":[45],"for":[46,70,97],"high":[47,123],"unity-gain-bandwidth":[48],"opamp.":[51],"elements":[55],"also":[61],"served":[62],"as":[63],"second":[65],"integrator":[66,80],"biquad":[69],"power":[71,133],"reduction.":[72],"low":[74],"noise":[75,83,92],"characteristics":[76],"passive":[79],"improve":[81],"performance":[84],"filter.":[87,137],"integrated":[91],"-61.7dBm.":[94],"SNR":[96],"-41dB-THD":[99],"72.1dB.":[101],"draws":[104],"only":[105],"3mA":[106],"from":[107],"1.8V":[108],"supply":[109],"voltage.":[110],"prototype":[113],"has":[114],"been":[115],"fabricated":[116],"180nm":[118],"CMOS":[119],"process.":[120],"figure-of-merit":[124],"164.8dB.J":[126],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-1</sup>":[129],"validates":[130],"good":[132],"efficiency":[134]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2023,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}