{"id":"https://openalex.org/W3210271453","doi":"https://doi.org/10.1109/esscirc53450.2021.9567748","title":"An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error Shaping","display_name":"An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error Shaping","publication_year":2021,"publication_date":"2021-09-13","ids":{"openalex":"https://openalex.org/W3210271453","doi":"https://doi.org/10.1109/esscirc53450.2021.9567748","mag":"3210271453"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc53450.2021.9567748","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc53450.2021.9567748","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://pure.tue.nl/ws/files/302760320/202109_ESSCIRC_paper.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005776843","display_name":"Hanyue Li","orcid":"https://orcid.org/0000-0002-7112-8154"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Hanyue Li","raw_affiliation_strings":["Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003167246","display_name":"Yuting Shen","orcid":"https://orcid.org/0000-0002-5379-2983"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Yuting Shen","raw_affiliation_strings":["Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004640968","display_name":"Haoming Xin","orcid":"https://orcid.org/0000-0001-9730-0365"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Haoming Xin","raw_affiliation_strings":["Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051691710","display_name":"Eugenio Cantatore","orcid":"https://orcid.org/0000-0002-9646-7232"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Eugenio Cantatore","raw_affiliation_strings":["Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010280308","display_name":"Pieter Harpe","orcid":"https://orcid.org/0000-0002-6542-0001"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Pieter Harpe","raw_affiliation_strings":["Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I83019370"],"apc_list":null,"apc_paid":null,"fwci":4.833,"has_fulltext":true,"cited_by_count":11,"citation_normalized_percentile":{"value":0.96608047,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"387","last_page":"390"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.8635209798812866},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.6093153357505798},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5747048258781433},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.5746603012084961},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5143641233444214},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.5106845498085022},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.49351632595062256},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.48397397994995117},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.46820786595344543},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4583352208137512},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.45128777623176575},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.44408655166625977},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.43292102217674255},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4156051278114319},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.3198504149913788},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3195152282714844},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.22451937198638916}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.8635209798812866},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6093153357505798},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5747048258781433},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.5746603012084961},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5143641233444214},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.5106845498085022},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.49351632595062256},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.48397397994995117},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46820786595344543},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4583352208137512},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.45128777623176575},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.44408655166625977},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.43292102217674255},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4156051278114319},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.3198504149913788},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3195152282714844},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.22451937198638916},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/esscirc53450.2021.9567748","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc53450.2021.9567748","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/edadaa0e-6db2-4364-b726-7ef9aea0e63e","is_oa":true,"landing_page_url":"https://research.tue.nl/en/publications/edadaa0e-6db2-4364-b726-7ef9aea0e63e","pdf_url":"https://pure.tue.nl/ws/files/302760320/202109_ESSCIRC_paper.pdf","source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Li, H, Shen, Y, Xin, H, Cantatore, E & Harpe, P 2021, An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error Shaping. in ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)., 9567748, Institute of Electrical and Electronics Engineers, pp. 387-390, 47th IEEE European Solid State Circuits Conference, ESSCIRC 2021, Grenoble, France, 13/09/21. https://doi.org/10.1109/ESSCIRC53450.2021.9567748","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:tue:oai:pure.tue.nl:publications/edadaa0e-6db2-4364-b726-7ef9aea0e63e","is_oa":true,"landing_page_url":"https://research.tue.nl/nl/publications/edadaa0e-6db2-4364-b726-7ef9aea0e63e","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC), 387 - 390","raw_type":"info:eu-repo/semantics/conferencepaper"}],"best_oa_location":{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/edadaa0e-6db2-4364-b726-7ef9aea0e63e","is_oa":true,"landing_page_url":"https://research.tue.nl/en/publications/edadaa0e-6db2-4364-b726-7ef9aea0e63e","pdf_url":"https://pure.tue.nl/ws/files/302760320/202109_ESSCIRC_paper.pdf","source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Li, H, Shen, Y, Xin, H, Cantatore, E & Harpe, P 2021, An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error Shaping. in ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)., 9567748, Institute of Electrical and Electronics Engineers, pp. 387-390, 47th IEEE European Solid State Circuits Conference, ESSCIRC 2021, Grenoble, France, 13/09/21. https://doi.org/10.1109/ESSCIRC53450.2021.9567748","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6600000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G8209487686","display_name":"Analog circuits to the limit: minimum resources with maximum performance","funder_award_id":"16594","funder_id":"https://openalex.org/F4320321800","funder_display_name":"Nederlandse Organisatie voor Wetenschappelijk Onderzoek"}],"funders":[{"id":"https://openalex.org/F4320321800","display_name":"Nederlandse Organisatie voor Wetenschappelijk Onderzoek","ror":"https://ror.org/04jsz6e67"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3210271453.pdf","grobid_xml":"https://content.openalex.org/works/W3210271453.grobid-xml"},"referenced_works_count":7,"referenced_works":["https://openalex.org/W2289098659","https://openalex.org/W2527632290","https://openalex.org/W2593067874","https://openalex.org/W2922215933","https://openalex.org/W3015386793","https://openalex.org/W3135662627","https://openalex.org/W6734037425"],"related_works":["https://openalex.org/W4206356469","https://openalex.org/W2904640696","https://openalex.org/W2054018984","https://openalex.org/W2752640128","https://openalex.org/W2942561789","https://openalex.org/W2783221760","https://openalex.org/W2997894768","https://openalex.org/W2568520569","https://openalex.org/W2345299457","https://openalex.org/W2418527074"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,12,16,45,88,94],"low-power":[4],"and":[5,15,28,76,82],"high-linearity":[6],"noise-shaping":[7],"SAR":[8],"ADC":[9,68],"that":[10],"employs":[11],"duty-cycled":[13,23],"amplifier":[14,24],"mismatch":[17,58],"error":[18,42],"shaping":[19,35,43],"technique.":[20],"The":[21,66],"power-efficient":[22],"with":[25,44],"18x":[26],"gain":[27],"two":[29],"passive":[30],"integrators":[31],"provide":[32],"2nd-order":[33],"noise":[34,39],"to":[36,52,93],"improve":[37],"in-band":[38],"attenuation.":[40],"Mismatch":[41],"two-level":[46],"digital":[47],"prediction":[48],"scheme":[49],"is":[50,69],"used":[51],"1st-order":[53],"shape":[54],"the":[55,62],"capacitive":[56],"DAC":[57],"errors":[59],"without":[60],"sacrificing":[61],"input":[63],"signal":[64],"range.":[65],"proposed":[67],"fabricated":[70],"in":[71,87],"65":[72],"nm":[73],"CMOS":[74],"technology":[75],"achieves":[77],"80":[78],"dB":[79,84],"peak":[80,85],"SNDR":[81],"98":[83],"SFDR":[86],"31.25":[89],"kHz":[90],"bandwidth,":[91],"leading":[92],"Schreier":[95],"FoM":[96],"of":[97],"176.3":[98],"dB.":[99]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
