{"id":"https://openalex.org/W2898643856","doi":"https://doi.org/10.1109/esscirc.2018.8494243","title":"A 320\u00b5V-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector","display_name":"A 320\u00b5V-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector","publication_year":2018,"publication_date":"2018-09-01","ids":{"openalex":"https://openalex.org/W2898643856","doi":"https://doi.org/10.1109/esscirc.2018.8494243","mag":"2898643856"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2018.8494243","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2018.8494243","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014960258","display_name":"Younghyun Lim","orcid":"https://orcid.org/0000-0003-3976-7236"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"education","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Younghyun Lim","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea","institution_ids":["https://openalex.org/I48566637"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008845081","display_name":"Jeonghyun Lee","orcid":"https://orcid.org/0000-0003-4487-364X"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"education","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jeonghyun Lee","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea","institution_ids":["https://openalex.org/I48566637"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068994388","display_name":"Yongsun Lee","orcid":"https://orcid.org/0000-0003-0654-9363"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"education","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yongsun Lee","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea","institution_ids":["https://openalex.org/I48566637"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003562051","display_name":"Seyeon Yoo","orcid":"https://orcid.org/0000-0003-1785-2376"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"education","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seyeon Yoo","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea","institution_ids":["https://openalex.org/I48566637"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004599468","display_name":"Jaehyouk Choi","orcid":"https://orcid.org/0000-0002-3055-8684"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"education","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaehyouk Choi","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea","institution_ids":["https://openalex.org/I48566637"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5014960258"],"corresponding_institution_ids":["https://openalex.org/I48566637"],"apc_list":null,"apc_paid":null,"fwci":0.111,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.46835033,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"210","last_page":"213"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ripple","display_name":"Ripple","score":0.7420140504837036},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.7095781564712524},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.5755691528320312},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5646114945411682},{"id":"https://openalex.org/keywords/transient-response","display_name":"Transient response","score":0.5445473790168762},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.529369592666626},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5238518714904785},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.49961185455322266},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4756162762641907},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.44105201959609985},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3815552890300751},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.34330689907073975},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3350561261177063},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30136483907699585},{"id":"https://openalex.org/keywords/step-response","display_name":"Step response","score":0.08429238200187683}],"concepts":[{"id":"https://openalex.org/C2779599953","wikidata":"https://www.wikidata.org/wiki/Q1776117","display_name":"Ripple","level":3,"score":0.7420140504837036},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.7095781564712524},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.5755691528320312},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5646114945411682},{"id":"https://openalex.org/C85761212","wikidata":"https://www.wikidata.org/wiki/Q1974593","display_name":"Transient response","level":2,"score":0.5445473790168762},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.529369592666626},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5238518714904785},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.49961185455322266},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4756162762641907},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.44105201959609985},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3815552890300751},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.34330689907073975},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3350561261177063},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30136483907699585},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.08429238200187683},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/esscirc.2018.8494243","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2018.8494243","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"},{"id":"pmh:oai:scholarworks.unist.ac.kr:201301/37134","is_oa":false,"landing_page_url":"https://scholarworks.unist.ac.kr/handle/201301/37134","pdf_url":null,"source":{"id":"https://openalex.org/S4306401118","display_name":"Scholarworks@UNIST (Ulsan National Institute of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I48566637","host_organization_name":"Ulsan National Institute of Science and Technology","host_organization_lineage":["https://openalex.org/I48566637"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"CONFERENCE"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7699999809265137,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320332195","display_name":"Samsung","ror":"https://ror.org/04w3jy968"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1669637212","https://openalex.org/W1992459337","https://openalex.org/W2172010302","https://openalex.org/W2537403501","https://openalex.org/W2591678100","https://openalex.org/W2593766759"],"related_works":["https://openalex.org/W2376981645","https://openalex.org/W3212871678","https://openalex.org/W2044698965","https://openalex.org/W2570024657","https://openalex.org/W2040677570","https://openalex.org/W1569876521","https://openalex.org/W2528104220","https://openalex.org/W3193095666","https://openalex.org/W4310614792","https://openalex.org/W2125626305"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"a":[3,8,15,21,53,58],"digital-analog-hybrid":[4],"LDO":[5],"(HLDO)":[6],"using":[7],"multi-level":[9],"gate-voltage":[10],"generator":[11],"(MGG)":[12],"to":[13,47,74],"achieve":[14],"small":[16],"output":[17],"ripple":[18],"(VR)":[19],"and":[20,38],"fast-transient":[22],"response.":[23],"Using":[24],"the":[25,34,63,71],"MGG":[26],"that":[27],"can":[28],"partially":[29],"turn":[30],"on":[31],"transistors":[32,66],"in":[33,67],"power":[35],"MOSFET":[36],"(Mp)":[37],"thus":[39],"reduce":[40],"Mp's":[41],"LSB":[42],"current,":[43],"VR":[44],"was":[45],"limited":[46],"less":[48,75],"than":[49,76],"320":[50],"\u03bcV.":[51],"Also,":[52],"fast-decision":[54],"PD":[55],"detector":[56],"having":[57],"non-zero":[59],"decision":[60],"level":[61],"expedited":[62],"switching":[64],"of":[65],"Mp,":[68],"thereby":[69],"reducing":[70],"settling":[72],"time":[73],"90":[77],"ns.":[78]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}