{"id":"https://openalex.org/W1980082365","doi":"https://doi.org/10.1109/esscirc.2012.6341344","title":"A high-input-swing common-mode-robust programmable gain amplifier in 65nm CMOS","display_name":"A high-input-swing common-mode-robust programmable gain amplifier in 65nm CMOS","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W1980082365","doi":"https://doi.org/10.1109/esscirc.2012.6341344","mag":"1980082365"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2012.6341344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341344","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036952742","display_name":"Daniel Gruber","orcid":"https://orcid.org/0000-0003-2169-0955"},"institutions":[{"id":"https://openalex.org/I4210115201","display_name":"Agency for Quality Assurance and Accreditation Austria","ror":"https://ror.org/023aw9j89","country_code":"AT","type":"government","lineage":["https://openalex.org/I4210115201"]},{"id":"https://openalex.org/I79172759","display_name":"Lantiq (Germany)","ror":"https://ror.org/01bvfdq42","country_code":"DE","type":"company","lineage":["https://openalex.org/I79172759"]}],"countries":["AT","DE"],"is_corresponding":false,"raw_author_name":"Daniel Gruber","raw_affiliation_strings":["Lantiq A GmbH, Villach, Austria","[Lantiq A GmbH., Villach, Austria]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lantiq A GmbH, Villach, Austria","institution_ids":["https://openalex.org/I4210115201"]},{"raw_affiliation_string":"[Lantiq A GmbH., Villach, Austria]","institution_ids":["https://openalex.org/I79172759"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037630143","display_name":"Martin Clara","orcid":"https://orcid.org/0000-0001-6991-3391"},"institutions":[{"id":"https://openalex.org/I4210115201","display_name":"Agency for Quality Assurance and Accreditation Austria","ror":"https://ror.org/023aw9j89","country_code":"AT","type":"government","lineage":["https://openalex.org/I4210115201"]},{"id":"https://openalex.org/I79172759","display_name":"Lantiq (Germany)","ror":"https://ror.org/01bvfdq42","country_code":"DE","type":"company","lineage":["https://openalex.org/I79172759"]}],"countries":["AT","DE"],"is_corresponding":false,"raw_author_name":"Martin Clara","raw_affiliation_strings":["Lantiq A GmbH, Villach, Austria","[Lantiq A GmbH., Villach, Austria]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lantiq A GmbH, Villach, Austria","institution_ids":["https://openalex.org/I4210115201"]},{"raw_affiliation_string":"[Lantiq A GmbH., Villach, Austria]","institution_ids":["https://openalex.org/I79172759"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067593635","display_name":"B. Seger","orcid":null},"institutions":[{"id":"https://openalex.org/I4210115201","display_name":"Agency for Quality Assurance and Accreditation Austria","ror":"https://ror.org/023aw9j89","country_code":"AT","type":"government","lineage":["https://openalex.org/I4210115201"]},{"id":"https://openalex.org/I79172759","display_name":"Lantiq (Germany)","ror":"https://ror.org/01bvfdq42","country_code":"DE","type":"company","lineage":["https://openalex.org/I79172759"]}],"countries":["AT","DE"],"is_corresponding":false,"raw_author_name":"Berthold Seger","raw_affiliation_strings":["Lantiq A GmbH, Villach, Austria","[Lantiq A GmbH., Villach, Austria]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lantiq A GmbH, Villach, Austria","institution_ids":["https://openalex.org/I4210115201"]},{"raw_affiliation_string":"[Lantiq A GmbH., Villach, Austria]","institution_ids":["https://openalex.org/I79172759"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.05756881,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"418","last_page":"421"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7583030462265015},{"id":"https://openalex.org/keywords/common-mode-signal","display_name":"Common-mode signal","score":0.7312096357345581},{"id":"https://openalex.org/keywords/swing","display_name":"Swing","score":0.7011364698410034},{"id":"https://openalex.org/keywords/fully-differential-amplifier","display_name":"Fully differential amplifier","score":0.6555535197257996},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.6208324432373047},{"id":"https://openalex.org/keywords/programmable-gain-amplifier","display_name":"Programmable-gain amplifier","score":0.6049172878265381},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.559353768825531},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.5057201385498047},{"id":"https://openalex.org/keywords/feed-forward","display_name":"Feed forward","score":0.4949111342430115},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4849553108215332},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.4796024560928345},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.47236090898513794},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4555470049381256},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4496111571788788},{"id":"https://openalex.org/keywords/differential-gain","display_name":"Differential gain","score":0.44280120730400085},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.43828529119491577},{"id":"https://openalex.org/keywords/common-gate","display_name":"Common gate","score":0.4209566116333008},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.22482988238334656},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.20131900906562805},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.1514264941215515}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7583030462265015},{"id":"https://openalex.org/C189714311","wikidata":"https://www.wikidata.org/wiki/Q1530371","display_name":"Common-mode signal","level":4,"score":0.7312096357345581},{"id":"https://openalex.org/C65655974","wikidata":"https://www.wikidata.org/wiki/Q14867674","display_name":"Swing","level":2,"score":0.7011364698410034},{"id":"https://openalex.org/C189184530","wikidata":"https://www.wikidata.org/wiki/Q5508342","display_name":"Fully differential amplifier","level":5,"score":0.6555535197257996},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.6208324432373047},{"id":"https://openalex.org/C2781023662","wikidata":"https://www.wikidata.org/wiki/Q2112149","display_name":"Programmable-gain amplifier","level":4,"score":0.6049172878265381},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.559353768825531},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.5057201385498047},{"id":"https://openalex.org/C38858127","wikidata":"https://www.wikidata.org/wiki/Q5441228","display_name":"Feed forward","level":2,"score":0.4949111342430115},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4849553108215332},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.4796024560928345},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.47236090898513794},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4555470049381256},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4496111571788788},{"id":"https://openalex.org/C2780630149","wikidata":"https://www.wikidata.org/wiki/Q5275345","display_name":"Differential gain","level":4,"score":0.44280120730400085},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.43828529119491577},{"id":"https://openalex.org/C2781117048","wikidata":"https://www.wikidata.org/wiki/Q3108612","display_name":"Common gate","level":4,"score":0.4209566116333008},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.22482988238334656},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.20131900906562805},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.1514264941215515},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C78434282","wikidata":"https://www.wikidata.org/wiki/Q11656","display_name":"Diode","level":2,"score":0.0},{"id":"https://openalex.org/C121477167","wikidata":"https://www.wikidata.org/wiki/Q17154002","display_name":"Semiconductor laser theory","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2012.6341344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341344","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1984526990","https://openalex.org/W2114228040","https://openalex.org/W2404790924"],"related_works":["https://openalex.org/W2018208561","https://openalex.org/W4308297196","https://openalex.org/W2517528138","https://openalex.org/W2143034207","https://openalex.org/W4372270659","https://openalex.org/W2394349332","https://openalex.org/W2385453601","https://openalex.org/W2347021819","https://openalex.org/W2146348002","https://openalex.org/W1980082365"],"abstract_inverted_index":{"A":[0],"single-stage":[1],"programmable":[2],"gain":[3,10,110],"amplifier":[4],"(PGA)":[5],"for":[6,72,111],"SoC-integration":[7],"with":[8,26,39,104,136],"50dB":[9],"range":[11],"and":[12,42,128],">;":[13],"30MHz":[14],"signal":[15,112,140],"bandwidth":[16],"is":[17,129],"implemented":[18],"in":[19,74,82],"a":[20,33,58,75,86,92,120,132,137],"digital":[21],"1.0V":[22],"65nm":[23],"CMOS":[24],"process":[25],"thick":[27],"gate":[28],"oxide":[29],"option.":[30],"It":[31],"uses":[32],"fully-differential":[34],"four-stage":[35],"operational":[36],"amplifier,":[37],"compensated":[38],"active":[40],"feedforward":[41],"frequency":[43],"selective":[44],"gain-stage":[45],"fading,":[46],"as":[47,49],"well":[48],"distributed":[50],"common-mode":[51,66,134,138],"feedback.":[52],"The":[53,79,117],"opamp":[54],"input":[55,70,123],"stage":[56],"features":[57],"special":[59],"design":[60],"to":[61,115],"achieve":[62],"high":[63],"robustness":[64],"against":[65,131],"disturbers":[67],"at":[68,107],"the":[69],"pins":[71],"operation":[73],"noisy":[76],"mixed-signal":[77],"environment.":[78],"PGA":[80,118],"consumes":[81],"total":[83],"25mW":[84],"from":[85],"split":[87],"1V/2.5V":[88],"supply,":[89],"while":[90],"delivering":[91],"differential":[93,101,122],"voltage":[94,109,124],"swing":[95,125],"of":[96,126,143],"1Vpp":[97],"into":[98],"an":[99],"800\u03a9":[100],"on-chip":[102],"load":[103],"IM3>;":[105],"70dB":[106],"12dB":[108],"frequencies":[113],"up":[114],"30MHz.":[116],"supports":[119],"maximum":[121],">;6Vpp":[127],"robust":[130],"150mVpp":[133],"disturber":[135],"\u00d7":[139],"cross":[141],"modulation":[142],"<;":[144],"-70dBc.":[145]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}