{"id":"https://openalex.org/W2053079108","doi":"https://doi.org/10.1109/esscirc.2012.6341300","title":"A differential self-biased slew rate controlled driver for accurate cross-over and rise-fall time matching","display_name":"A differential self-biased slew rate controlled driver for accurate cross-over and rise-fall time matching","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2053079108","doi":"https://doi.org/10.1109/esscirc.2012.6341300","mag":"2053079108"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2012.6341300","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072459071","display_name":"Sumantra Seth","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]},{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]}],"countries":["IN","US"],"is_corresponding":true,"raw_author_name":"Sumantra Seth","raw_affiliation_strings":["Texas Instruments, Inc., India","[Texas Instruments, INDIA]"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Inc., India","institution_ids":["https://openalex.org/I4210109535"]},{"raw_affiliation_string":"[Texas Instruments, INDIA]","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074979848","display_name":"Jayesh Wadekar","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]},{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["IN","US"],"is_corresponding":false,"raw_author_name":"Jayesh Wadekar","raw_affiliation_strings":["Texas Instruments, Inc., India","[Texas Instruments, INDIA]"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Inc., India","institution_ids":["https://openalex.org/I4210109535"]},{"raw_affiliation_string":"[Texas Instruments, INDIA]","institution_ids":["https://openalex.org/I74760111"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5072459071"],"corresponding_institution_ids":["https://openalex.org/I4210109535","https://openalex.org/I74760111"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11552914,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"229","last_page":"232"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.572942852973938},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5471639633178711},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.5226816534996033},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.48975372314453125},{"id":"https://openalex.org/keywords/rise-time","display_name":"Rise time","score":0.4792092740535736},{"id":"https://openalex.org/keywords/differential","display_name":"Differential (mechanical device)","score":0.47248998284339905},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4345027804374695},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4181378483772278},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4121793508529663},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.32117927074432373},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12146291136741638}],"concepts":[{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.572942852973938},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5471639633178711},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.5226816534996033},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.48975372314453125},{"id":"https://openalex.org/C47586369","wikidata":"https://www.wikidata.org/wiki/Q377672","display_name":"Rise time","level":3,"score":0.4792092740535736},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.47248998284339905},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4345027804374695},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4181378483772278},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4121793508529663},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32117927074432373},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12146291136741638},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2012.6341300","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5199999809265137,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2018823985","https://openalex.org/W2143905108","https://openalex.org/W2149726630","https://openalex.org/W2157289340","https://openalex.org/W2169676602"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2354365353","https://openalex.org/W1988437325","https://openalex.org/W2811287415","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W2354835317","https://openalex.org/W2077139292","https://openalex.org/W2070694218","https://openalex.org/W2532822217"],"abstract_inverted_index":{"A":[0],"self":[1],"biased":[2],"cross":[3,21],"coupled":[4],"12Mbps":[5],"3.3V":[6,30],"differential":[7],"voltage":[8,67],"driver":[9],"presented":[10],"with":[11,48],"<;+/-3%":[12],"rise-fall":[13,57],"time":[14,58],"mismatch":[15],"for":[16,45],"paired":[17],"transitions":[18],"ensuring":[19],"accurate":[20],"over":[22,60],"voltage.":[23],"Implemented":[24],"in":[25],"45nm":[26],"CMOS":[27],"technology":[28],"without":[29],"gate":[31],"oxide":[32],"device,":[33],"design":[34],"occupies":[35],"0.083":[36],"mm":[37],"<sup":[38],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[39],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[40],"and":[41,68],"consumes":[42],"<;":[43],"15mW":[44],"50pF":[46],"load":[47,62],"6MHz":[49],"clock":[50],"pattern.":[51],"This":[52],"architecture":[53],"achieves":[54],"a":[55],"~1.57X":[56],"variation":[59,64],"12X":[61],"capacitor":[63],"across":[65],"process,":[66],"temperature.":[69]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}