{"id":"https://openalex.org/W2074029859","doi":"https://doi.org/10.1109/esscirc.2012.6341260","title":"A 0.8-V 1.2-&amp;#x03BC;W rail-to-rail fully differential OpAmp with adaptive biasing","display_name":"A 0.8-V 1.2-&amp;#x03BC;W rail-to-rail fully differential OpAmp with adaptive biasing","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2074029859","doi":"https://doi.org/10.1109/esscirc.2012.6341260","mag":"2074029859"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2012.6341260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007752714","display_name":"M. R. Valero","orcid":"https://orcid.org/0000-0002-9416-7092"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"M. R. Valero","raw_affiliation_strings":["Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain"],"affiliations":[{"raw_affiliation_string":"Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075718351","display_name":"S. Celma","orcid":"https://orcid.org/0000-0003-0182-7723"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"S. Celma","raw_affiliation_strings":["Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain"],"affiliations":[{"raw_affiliation_string":"Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045657781","display_name":"N. Medrano","orcid":"https://orcid.org/0000-0002-5380-3013"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"N. Medrano","raw_affiliation_strings":["Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain"],"affiliations":[{"raw_affiliation_string":"Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009944115","display_name":"B. Calvo","orcid":"https://orcid.org/0000-0003-2361-1077"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"B. Calvo","raw_affiliation_strings":["Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain"],"affiliations":[{"raw_affiliation_string":"Group of Electronic Design-I3A, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"Group of Electronic Design - I3A, University of Zaragoza, E-50009 Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5007752714"],"corresponding_institution_ids":["https://openalex.org/I255234318"],"apc_list":null,"apc_paid":null,"fwci":0.6199,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7033344,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"77","last_page":"80"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/slew-rate","display_name":"Slew rate","score":0.8357972502708435},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.8110010623931885},{"id":"https://openalex.org/keywords/phase-margin","display_name":"Phase margin","score":0.792732834815979},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6111159324645996},{"id":"https://openalex.org/keywords/frequency-compensation","display_name":"Frequency compensation","score":0.5486619472503662},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.548169732093811},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.5319505333900452},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5185161828994751},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4458598494529724},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.44208580255508423},{"id":"https://openalex.org/keywords/buffer-amplifier","display_name":"Buffer amplifier","score":0.425680547952652},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3982190191745758},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3752458095550537},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3431878089904785}],"concepts":[{"id":"https://openalex.org/C82517063","wikidata":"https://www.wikidata.org/wiki/Q1591315","display_name":"Slew rate","level":3,"score":0.8357972502708435},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.8110010623931885},{"id":"https://openalex.org/C81455027","wikidata":"https://www.wikidata.org/wiki/Q7180955","display_name":"Phase margin","level":5,"score":0.792732834815979},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6111159324645996},{"id":"https://openalex.org/C131782439","wikidata":"https://www.wikidata.org/wiki/Q1455581","display_name":"Frequency compensation","level":4,"score":0.5486619472503662},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.548169732093811},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.5319505333900452},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5185161828994751},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4458598494529724},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.44208580255508423},{"id":"https://openalex.org/C127749002","wikidata":"https://www.wikidata.org/wiki/Q978470","display_name":"Buffer amplifier","level":4,"score":0.425680547952652},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3982190191745758},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3752458095550537},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3431878089904785}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/esscirc.2012.6341260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"},{"id":"pmh:oai:research-information.bris.ac.uk:openaire_cris_publications/1e4e2e42-5554-4432-9a5b-b8a852a2c468","is_oa":false,"landing_page_url":"https://research-information.bris.ac.uk/en/publications/1e4e2e42-5554-4432-9a5b-b8a852a2c468","pdf_url":null,"source":{"id":"https://openalex.org/S7407055359","display_name":"Explore Bristol Research","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Valero, M R, Celma-Pueyo, S, Medrano, N & Calvo, B 2012, A 0.8-V 1.2-\u03bcW rail-to-rail fully differential OpAmp with adaptive biasing. in 2012 Proceedings of the European Solid State Circuits Conference, ESSCIRC 2012., 6341260, European Solid-State Circuits Conference, pp. 77-80. https://doi.org/10.1109/ESSCIRC.2012.6341260","raw_type":"contributionToPeriodical"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W649475307","https://openalex.org/W1510852139","https://openalex.org/W1606543380","https://openalex.org/W2024489801","https://openalex.org/W2125337150","https://openalex.org/W2127623898","https://openalex.org/W2138289226","https://openalex.org/W6636234841"],"related_works":["https://openalex.org/W4386167960","https://openalex.org/W2062178330","https://openalex.org/W2969974063","https://openalex.org/W2377703593","https://openalex.org/W2609872686","https://openalex.org/W2513549397","https://openalex.org/W2051056883","https://openalex.org/W2944773137","https://openalex.org/W2102700512","https://openalex.org/W2074029859"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"ultra":[4],"low-power":[5,32],"rail-to-rail":[6],"fully":[7],"differential":[8],"operational":[9],"amplifier":[10],"(OpAmp)":[11],"fabricated":[12],"in":[13,26],"a":[14,35,47,62,75,83,94],"standard":[15],"0.18":[16],"\u03bcm":[17],"CMOS":[18],"technology.":[19],"The":[20],"proposed":[21],"circuit":[22],"uses":[23],"transistors":[24],"biased":[25],"the":[27,87,91],"sub-threshold":[28],"region":[29],"for":[30],"low-voltage":[31],"operation.":[33],"For":[34],"0.8":[36],"V":[37],"single":[38],"supply":[39],"and":[40,61],"8":[41],"pF":[42],"loads,":[43],"experimental":[44],"measurements":[45],"shows":[46],"51":[48],"dB":[49,77],"open":[50],"loop":[51],"gain,":[52],"62\u00b0":[53],"phase":[54],"margin,":[55],"57":[56],"kHz":[57],"unity":[58],"gain":[59],"frequency":[60],"750":[63],"mV":[64],"linear":[65],"output":[66],"swing.":[67],"Adaptive":[68],"biasing":[69],"provides":[70],"0.14":[71],"V/\u03bcs":[72],"slew-rate,":[73],"while":[74],"73":[76],"CMRR":[78],"is":[79],"achieved":[80],"thanks":[81],"to":[82],"CMFF":[84],"circuit,":[85],"demonstrating":[86],"correct":[88],"functionality":[89],"of":[90,97],"OpAmp":[92],"with":[93],"power":[95],"consumption":[96],"1.2":[98],"\u03bcW.":[99]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-16T09:10:04.655348","created_date":"2025-10-10T00:00:00"}
