{"id":"https://openalex.org/W2125154572","doi":"https://doi.org/10.1109/esscirc.2008.4681808","title":"On-chip jitter and oscilloscope circuits using an asynchronous sample clock","display_name":"On-chip jitter and oscilloscope circuits using an asynchronous sample clock","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2125154572","doi":"https://doi.org/10.1109/esscirc.2008.4681808","mag":"2125154572"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2008.4681808","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2008.4681808","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2008 - 34th European Solid-State Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032235793","display_name":"J.D. Schaub","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"J. D. Schaub","raw_affiliation_strings":["IBM Austin Research Laboratory, Austin, TX, USA","IBM Austin Research Lab Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM Austin Research Lab Austin, TX#TAB#","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067896641","display_name":"Fadi H. Gebara","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"F. H. Gebara","raw_affiliation_strings":["IBM Austin Research Laboratory, Austin, TX, USA","IBM Austin Research Lab Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM Austin Research Lab Austin, TX#TAB#","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100987574","display_name":"Tuyet Nguyen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Y. Nguyen","raw_affiliation_strings":["IBM Austin Research Laboratory, Austin, TX, USA","IBM Austin Research Lab Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM Austin Research Lab Austin, TX#TAB#","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110274755","display_name":"Ivan Vo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"I. Vo","raw_affiliation_strings":["IBM Austin Research Laboratory, Austin, TX, USA","IBM Austin Research Lab Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM Austin Research Lab Austin, TX#TAB#","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":null,"display_name":"J. Pena","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Pena","raw_affiliation_strings":["IBM Austin Research Laboratory, Austin, TX, USA","IBM Austin Research Lab Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM Austin Research Lab Austin, TX#TAB#","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039962291","display_name":"Dhruva Acharyya","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. J. Acharyya","raw_affiliation_strings":["IBM Austin Research Laboratory, Austin, TX, USA","IBM Austin Research Lab Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM Austin Research Lab Austin, TX#TAB#","institution_ids":["https://openalex.org/I4210156936"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5032235793"],"corresponding_institution_ids":["https://openalex.org/I4210156936"],"apc_list":null,"apc_paid":null,"fwci":0.339,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.66166354,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"126","last_page":"129"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9897000193595886,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9890000224113464,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8755961656570435},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.7097811698913574},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6772463917732239},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.666273295879364},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.6508201360702515},{"id":"https://openalex.org/keywords/oscilloscope","display_name":"Oscilloscope","score":0.650522768497467},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.5735160708427429},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.547469973564148},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.5257169604301453},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5207540988922119},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5021681785583496},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4978630542755127},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.48992985486984253},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.4680081903934479},{"id":"https://openalex.org/keywords/signal-generator","display_name":"Signal generator","score":0.42962077260017395},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4201989769935608},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2588266134262085},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.1540735960006714},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1336595118045807},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0966414213180542}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8755961656570435},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.7097811698913574},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6772463917732239},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.666273295879364},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.6508201360702515},{"id":"https://openalex.org/C184026988","wikidata":"https://www.wikidata.org/wiki/Q174320","display_name":"Oscilloscope","level":3,"score":0.650522768497467},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.5735160708427429},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.547469973564148},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.5257169604301453},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5207540988922119},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5021681785583496},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4978630542755127},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.48992985486984253},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.4680081903934479},{"id":"https://openalex.org/C207912722","wikidata":"https://www.wikidata.org/wiki/Q1259123","display_name":"Signal generator","level":3,"score":0.42962077260017395},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4201989769935608},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2588266134262085},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.1540735960006714},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1336595118045807},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0966414213180542},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2008.4681808","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2008.4681808","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2008 - 34th European Solid-State Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6800000071525574,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1604115488","https://openalex.org/W1949058485","https://openalex.org/W2076264849","https://openalex.org/W2117917559","https://openalex.org/W2121893773","https://openalex.org/W2123716779","https://openalex.org/W2141592563","https://openalex.org/W2546634348","https://openalex.org/W6640586653","https://openalex.org/W6681436805"],"related_works":["https://openalex.org/W2169622190","https://openalex.org/W2224788396","https://openalex.org/W2117541676","https://openalex.org/W2171851068","https://openalex.org/W2143420037","https://openalex.org/W2496244846","https://openalex.org/W2117814846","https://openalex.org/W2082030077","https://openalex.org/W2615366277","https://openalex.org/W1505287829"],"abstract_inverted_index":{"We":[0,38],"demonstrate":[1],"digital":[2],"circuits":[3,16],"for":[4,29],"measuring":[5],"the":[6,27],"jitter":[7,64],"histograms":[8],"of":[9,66],"gigahertz":[10],"clock":[11,33,48,69],"and":[12,21,50,56,71],"data":[13,75],"signals.":[14,76],"The":[15,59],"do":[17],"not":[18],"require":[19],"calibration,":[20],"an":[22,30],"asynchronous":[23],"sampling":[24],"technique":[25,61],"alleviates":[26],"need":[28],"on-chip":[31],"sample":[32],"generator":[34],"with":[35],"delay":[36],"control.":[37],"combine":[39],"measurements":[40,65],"across":[41],"swept":[42],"reference":[43],"voltages":[44],"to":[45],"create":[46],"statistical":[47],"signal":[49],"eye":[51],"diagram":[52],"waveforms":[53],"at":[54],"6GHz":[55],"5Gbit/s,":[57],"respectively.":[58],"proposed":[60],"produced":[62],"RMS":[63],"2.0ps":[67],"on":[68,73],"signals":[70],"6.2ps":[72],"random":[74]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}
