{"id":"https://openalex.org/W2169168673","doi":"https://doi.org/10.1109/esscirc.2007.4430289","title":"A 14-mW, 153.6-MHz clock-rate &amp;#x0394;&amp;#x2211; modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch","display_name":"A 14-mW, 153.6-MHz clock-rate &amp;#x0394;&amp;#x2211; modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch","publication_year":2007,"publication_date":"2007-09-01","ids":{"openalex":"https://openalex.org/W2169168673","doi":"https://doi.org/10.1109/esscirc.2007.4430289","mag":"2169168673"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2007.4430289","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2007.4430289","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"Proceedings of ESSCIRC","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024208567","display_name":"O.A. Adeniran","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Olujide A. Adeniran","raw_affiliation_strings":["Mirics Semiconductor, Inc., UK"],"affiliations":[{"raw_affiliation_string":"Mirics Semiconductor, Inc., UK","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012493816","display_name":"Andreas Demosthenous","orcid":"https://orcid.org/0000-0003-0623-963X"},"institutions":[{"id":"https://openalex.org/I45129253","display_name":"University College London","ror":"https://ror.org/02jx3x895","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I45129253"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Andreas Demosthenous","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University College London, London, UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University College London, London, UK","institution_ids":["https://openalex.org/I45129253"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5024208567"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2611,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.64126531,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"244","last_page":"247"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.9660032987594604},{"id":"https://openalex.org/keywords/switched-capacitor","display_name":"Switched capacitor","score":0.765873908996582},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6965424418449402},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5656659603118896},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.5614733695983887},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5487231016159058},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.5345978140830994},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5263059139251709},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.47843673825263977},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.4765534996986389},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.46659114956855774},{"id":"https://openalex.org/keywords/high-dynamic-range","display_name":"High dynamic range","score":0.43903931975364685},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21540036797523499},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.06766453385353088}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.9660032987594604},{"id":"https://openalex.org/C103357873","wikidata":"https://www.wikidata.org/wiki/Q572656","display_name":"Switched capacitor","level":4,"score":0.765873908996582},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6965424418449402},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5656659603118896},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.5614733695983887},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5487231016159058},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.5345978140830994},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5263059139251709},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.47843673825263977},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4765534996986389},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.46659114956855774},{"id":"https://openalex.org/C2780056265","wikidata":"https://www.wikidata.org/wiki/Q106239881","display_name":"High dynamic range","level":3,"score":0.43903931975364685},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21540036797523499},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.06766453385353088}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2007.4430289","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2007.4430289","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"Proceedings of ESSCIRC","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8799999952316284}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W605564925","https://openalex.org/W1525204042","https://openalex.org/W2036927890","https://openalex.org/W2099432139","https://openalex.org/W2155515416","https://openalex.org/W2157287967","https://openalex.org/W2178553105","https://openalex.org/W2241331913","https://openalex.org/W2405891200","https://openalex.org/W4299973078"],"related_works":["https://openalex.org/W2128664218","https://openalex.org/W2113293319","https://openalex.org/W2124911477","https://openalex.org/W2137197505","https://openalex.org/W2005714378","https://openalex.org/W2044524120","https://openalex.org/W2884377208","https://openalex.org/W2159595243","https://openalex.org/W1991579521","https://openalex.org/W2525745698"],"abstract_inverted_index":{"The":[0,68,111],"performance":[1],"of":[2,16,46,81,100,108,125],"a":[3,58,82,90,106,117],"switched-capacitor":[4,84],"delta-sigma":[5],"(DeltaSigma)":[6],"analog-to-digital":[7],"converter":[8],"(ADC)":[9],"is":[10,22,52,76,103],"greatly":[11],"degraded":[12],"by":[13],"the":[14,17,38,44,63,73,79],"linearity":[15],"input":[18,39,65],"sampling":[19,41],"switch.":[20],"This":[21],"especially":[23],"so":[24],"in":[25,54,89],"older":[26],"cheaper":[27],"technologies":[28],"where":[29],"very-low":[30],"threshold":[31],"voltage":[32],"devices":[33],"are":[34],"unavailable.":[35],"To":[36],"address":[37],"switch":[40,51],"distortion":[42],"issue,":[43],"use":[45],"an":[47,123],"optimized":[48],"bootstrapped":[49],"CMOS":[50],"proposed":[53,74],"this":[55],"paper,":[56],"featuring":[57],"constant":[59],"on-":[60],"resistance":[61],"over":[62],"entire":[64],"signal":[66],"range.":[67],"dynamic":[69,97],"range":[70,98],"improvement":[71],"with":[72,78],"approach":[75],"validated":[77],"design":[80],"fourth-order,":[83],"DeltaSigma":[85],"modulator":[86,112],"for":[87],"WCDMA":[88],"0.35-mum":[91],"BiCMOS":[92],"process":[93],"technology.":[94],"Measured":[95],"spurious-free":[96],"(SFDR)":[99],"77":[101],"dB":[102],"achieved":[104],"at":[105],"clock-rate":[107],"153.6":[109],"MHz.":[110],"dissipates":[113],"14":[114],"mW":[115],"from":[116],"2.7-V":[118],"power":[119],"supply":[120],"and":[121],"occupies":[122],"area":[124],"0.2":[126],"mm":[127],"<sup":[128],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[129],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[130],".":[131]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}