{"id":"https://openalex.org/W2168483816","doi":"https://doi.org/10.1109/esscirc.2007.4430278","title":"Variation tolerant high resolution and low latency time-to-digital converter","display_name":"Variation tolerant high resolution and low latency time-to-digital converter","publication_year":2007,"publication_date":"2007-09-01","ids":{"openalex":"https://openalex.org/W2168483816","doi":"https://doi.org/10.1109/esscirc.2007.4430278","mag":"2168483816"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2007.4430278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2007.4430278","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"Proceedings of ESSCIRC","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111472507","display_name":"Stephan Henzler","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"S. Henzler","raw_affiliation_strings":["Advanced Systems and Circuits, Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Advanced Systems and Circuits, Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039914806","display_name":"S. Koeppe","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"S. Koeppe","raw_affiliation_strings":["Advanced Systems and Circuits, Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Advanced Systems and Circuits, Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061289830","display_name":"Dominik Lorenz","orcid":"https://orcid.org/0000-0002-6727-1476"},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"D. Lorenz","raw_affiliation_strings":["Advanced Systems and Circuits, Infineon Technologies, Munich, Germany","Institute for Technical Electronics, Technical University Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Advanced Systems and Circuits, Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]},{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109388481","display_name":"W. Kamp","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"W. Kamp","raw_affiliation_strings":["Advanced Systems and Circuits, Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Advanced Systems and Circuits, Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045199487","display_name":"Ronald Kuenemund","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"R. Kuenemund","raw_affiliation_strings":["Advanced Systems and Circuits, Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Advanced Systems and Circuits, Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034576088","display_name":"D. Schmitt\u2010Landsiedel","orcid":"https://orcid.org/0000-0002-4817-5139"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Schmitt-Landsiedel","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5111472507"],"corresponding_institution_ids":["https://openalex.org/I137594350"],"apc_list":null,"apc_paid":null,"fwci":2.4587,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.89626699,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"28","issue":null,"first_page":"194","last_page":"197"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.6878288388252258},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.6704131364822388},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6600536108016968},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.6052210927009583},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5714532136917114},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.558235764503479},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5185785293579102},{"id":"https://openalex.org/keywords/low-latency","display_name":"Low latency (capital markets)","score":0.4761747717857361},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.44752514362335205},{"id":"https://openalex.org/keywords/high-resolution","display_name":"High resolution","score":0.416337251663208},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.40288046002388},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2861784100532532},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23047363758087158},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.17860543727874756},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13942474126815796},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10105660557746887},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.09774881601333618}],"concepts":[{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.6878288388252258},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.6704131364822388},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6600536108016968},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.6052210927009583},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5714532136917114},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.558235764503479},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5185785293579102},{"id":"https://openalex.org/C46637626","wikidata":"https://www.wikidata.org/wiki/Q6693015","display_name":"Low latency (capital markets)","level":2,"score":0.4761747717857361},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.44752514362335205},{"id":"https://openalex.org/C3020199158","wikidata":"https://www.wikidata.org/wiki/Q210521","display_name":"High resolution","level":2,"score":0.416337251663208},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.40288046002388},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2861784100532532},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23047363758087158},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.17860543727874756},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13942474126815796},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10105660557746887},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.09774881601333618},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C62649853","wikidata":"https://www.wikidata.org/wiki/Q199687","display_name":"Remote sensing","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2007.4430278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2007.4430278","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"Proceedings of ESSCIRC","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8500000238418579}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321114","display_name":"Bundesministerium f\u00fcr Bildung und Forschung","ror":"https://ror.org/04pz7b180"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2062952706","https://openalex.org/W2111146745","https://openalex.org/W2128282260","https://openalex.org/W2152144298","https://openalex.org/W2152338756","https://openalex.org/W2159971659","https://openalex.org/W2163630970","https://openalex.org/W2164002677","https://openalex.org/W6677099794"],"related_works":["https://openalex.org/W3158414702","https://openalex.org/W2296652335","https://openalex.org/W2027271865","https://openalex.org/W1589093285","https://openalex.org/W2080140894","https://openalex.org/W2806710531","https://openalex.org/W4242653850","https://openalex.org/W2735892162","https://openalex.org/W4292874278","https://openalex.org/W4206344865"],"abstract_inverted_index":{"A":[0,14],"high":[1,33],"resolution":[2,34,59,73],"time-to-digital":[3],"converter":[4],"(TDC)":[5],"with":[6,28,53,57],"low":[7,10,68],"latency":[8],"and":[9,79],"deadtime":[11],"is":[12,25,36,51],"proposed.":[13],"coarse":[15],"time":[16],"quantization":[17],"derived":[18,83],"from":[19],"a":[20,58,65],"differential":[21],"inverter":[22,62],"delay":[23],"line":[24],"locally":[26],"interpolated":[27],"passive":[29],"voltage":[30],"dividers.":[31],"The":[32,49,72],"TDC":[35,56],"monotonic":[37],"by":[38,76],"construction":[39],"which":[40],"makes":[41],"the":[42],"concept":[43],"very":[44],"robust":[45],"against":[46],"process":[47],"variations.":[48],"feasibility":[50],"demonstrated":[52],"an":[54],"8-bit":[55],"of":[60],"0.25":[61],"delays":[63],"in":[64],"90":[66],"nm":[67],"power":[69],"CMOS":[70],"technology.":[71],"limits":[74],"imposed":[75],"clock":[77],"uncertainty":[78],"local":[80],"variations":[81],"are":[82],"theoretically.":[84]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}