{"id":"https://openalex.org/W2107305407","doi":"https://doi.org/10.1109/esscirc.2007.4430277","title":"Half V&lt;inf&gt;DD&lt;/inf&gt; Clock-Swing Flip-Flop with Reduced Contention for up to 60% Power Saving in Clock Distribution","display_name":"Half V&lt;inf&gt;DD&lt;/inf&gt; Clock-Swing Flip-Flop with Reduced Contention for up to 60% Power Saving in Clock Distribution","publication_year":2007,"publication_date":"2007-09-01","ids":{"openalex":"https://openalex.org/W2107305407","doi":"https://doi.org/10.1109/esscirc.2007.4430277","mag":"2107305407"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2007.4430277","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2007.4430277","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"Proceedings of ESSCIRC","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026369249","display_name":"David Levacq","orcid":"https://orcid.org/0000-0001-9121-7333"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"David Levacq","raw_affiliation_strings":["Center for Collaborative Research, University of Tokyo, Tokyo, Japan","University of Tokyo, Tokyo,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Collaborative Research, University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]},{"raw_affiliation_string":"University of Tokyo, Tokyo,","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041180179","display_name":"Muhammad Yazid","orcid":null},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Muhammad Yazid","raw_affiliation_strings":["Fujitsu Microsolutions, Kanagawa, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fujitsu Microsolutions, Kanagawa, Japan","institution_ids":["https://openalex.org/I2252096349"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052940529","display_name":"Hiroshi Kawaguchi","orcid":"https://orcid.org/0000-0001-8677-4733"},"institutions":[{"id":"https://openalex.org/I65837984","display_name":"Kobe University","ror":"https://ror.org/03tgsfw79","country_code":"JP","type":"education","lineage":["https://openalex.org/I65837984"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroshi Kawaguchi","raw_affiliation_strings":["Kobe University, Kobe, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kobe University, Kobe, Japan","institution_ids":["https://openalex.org/I65837984"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003282110","display_name":"Makoto Takamiya","orcid":"https://orcid.org/0000-0003-0289-7790"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Makoto Takamiya","raw_affiliation_strings":["Center for Collaborative Research, University of Tokyo, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Collaborative Research, University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007151780","display_name":"Takayasu Sakurai","orcid":null},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takayasu Sakurai","raw_affiliation_strings":["Center for Collaborative Research, University of Tokyo, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Collaborative Research, University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4991,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.60351535,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"190","last_page":"193"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/swing","display_name":"Swing","score":0.7242782115936279},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.6438890695571899},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46906304359436035},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.40089547634124756},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3361812233924866},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2933123707771301},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.21632197499275208},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16239634156227112},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.04814818501472473}],"concepts":[{"id":"https://openalex.org/C65655974","wikidata":"https://www.wikidata.org/wiki/Q14867674","display_name":"Swing","level":2,"score":0.7242782115936279},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.6438890695571899},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46906304359436035},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.40089547634124756},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3361812233924866},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2933123707771301},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.21632197499275208},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16239634156227112},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.04814818501472473},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.0},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2007.4430277","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2007.4430277","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"Proceedings of ESSCIRC","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320912","display_name":"Ministry of Education, Culture, Sports, Science and Technology","ror":"https://ror.org/048rj2z13"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2041053190","https://openalex.org/W2109195618","https://openalex.org/W2147323429","https://openalex.org/W2158881717","https://openalex.org/W2170265438","https://openalex.org/W2172290836","https://openalex.org/W3142563463"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2360051520","https://openalex.org/W2798244654","https://openalex.org/W3168108534","https://openalex.org/W34871393","https://openalex.org/W4206135463","https://openalex.org/W1486689224","https://openalex.org/W2094697992","https://openalex.org/W4229574949"],"abstract_inverted_index":{"A":[0],"new":[1,92],"low":[2,11],"clock":[3,12,102],"swing":[4,13,87],"flip-flop":[5],"(F/F)":[6],"is":[7,79],"proposed.":[8],"The":[9],"existing":[10],"F/F\u2019s":[14],"consume":[15],"high":[16],"power,":[17],"introduce":[18],"speed":[19],"penalty":[20],"due":[21,30],"to":[22,31,75,97],"contention":[23,39],"currents":[24],"or":[25],"require":[26],"large":[27],"silicon":[28],"area":[29,67],"separate":[32],"well":[33],"for":[34],"substrate":[35],"biasing.":[36],"By":[37],"reducing":[38],"currents,":[40],"our":[41],"proposal":[42],"efficiently":[43],"mitigates":[44],"those":[45],"issues.":[46],"Measurements":[47],"and":[48,70],"simulations":[49],"are":[50],"carried":[51],"out":[52],"based":[53],"on":[54],"a":[55,85],"90":[56],"nm":[57],"CMOS":[58],"process,":[59],"demonstrating":[60],"reductions":[61],"of":[62,84,99],"active":[63],"power":[64],"by":[65,68,72],"71%,":[66],"36%":[69],"delay":[71],"35%":[73],"compared":[74],"previous":[76],"proposals.":[77],"It":[78],"shown":[80],"that":[81],"the":[82,91,100],"combination":[83],"low-clock":[86],"distribution":[88],"tree":[89],"with":[90],"F/F":[93],"can":[94],"save":[95],"up":[96],"60%":[98],"total":[101],"system":[103],"power.":[104]},"counts_by_year":[{"year":2015,"cited_by_count":3},{"year":2013,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
