{"id":"https://openalex.org/W1482692508","doi":"https://doi.org/10.1109/esscirc.2003.1257206","title":"An ultra low-power adiabatic adder embedded in a standard 0.13\u03bcm CMOS environment","display_name":"An ultra low-power adiabatic adder embedded in a standard 0.13\u03bcm CMOS environment","publication_year":2004,"publication_date":"2004-07-20","ids":{"openalex":"https://openalex.org/W1482692508","doi":"https://doi.org/10.1109/esscirc.2003.1257206","mag":"1482692508"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2003.1257206","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2003.1257206","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007303066","display_name":"E. Amirante","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"E. Amirante","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026323518","display_name":"J. Fischer","orcid":"https://orcid.org/0000-0002-6789-6062"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"J. Fischer","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078475557","display_name":"Michael Lang","orcid":"https://orcid.org/0000-0002-3498-6352"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Lang","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019707969","display_name":"A. Bargagli-Stoffi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"A. Bargagli-Stoffi","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110260182","display_name":"J. Berthold","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. Berthold","raw_affiliation_strings":["Corporate Research, Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Corporate Research, Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049263798","display_name":"C. Heer","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"C. Heer","raw_affiliation_strings":["Corporate Research, Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Corporate Research, Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034576088","display_name":"D. Schmitt\u2010Landsiedel","orcid":"https://orcid.org/0000-0002-4817-5139"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Schmitt-Landsiedel","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5007303066"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.6333,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.88858761,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"38","issue":null,"first_page":"599","last_page":"602"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.8505086898803711},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7871731519699097},{"id":"https://openalex.org/keywords/ultra-low-power","display_name":"Ultra low power","score":0.6866146922111511},{"id":"https://openalex.org/keywords/adiabatic-circuit","display_name":"Adiabatic circuit","score":0.5392237305641174},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.5330240726470947},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.49813079833984375},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4633392095565796},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4614620804786682},{"id":"https://openalex.org/keywords/adiabatic-process","display_name":"Adiabatic process","score":0.44371718168258667},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3961877226829529},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37809062004089355},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.31263720989227295},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.2501522898674011},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.24242132902145386},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.2320692539215088},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15900841355323792},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.14781028032302856},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.10006880760192871}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.8505086898803711},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7871731519699097},{"id":"https://openalex.org/C3017773396","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Ultra low power","level":4,"score":0.6866146922111511},{"id":"https://openalex.org/C87606752","wikidata":"https://www.wikidata.org/wiki/Q4682637","display_name":"Adiabatic circuit","level":5,"score":0.5392237305641174},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.5330240726470947},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.49813079833984375},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4633392095565796},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4614620804786682},{"id":"https://openalex.org/C109663097","wikidata":"https://www.wikidata.org/wiki/Q182453","display_name":"Adiabatic process","level":2,"score":0.44371718168258667},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3961877226829529},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37809062004089355},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.31263720989227295},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.2501522898674011},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.24242132902145386},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2320692539215088},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15900841355323792},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.14781028032302856},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.10006880760192871},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2003.1257206","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2003.1257206","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1556126470","https://openalex.org/W2000700787","https://openalex.org/W2050873467","https://openalex.org/W2085952730","https://openalex.org/W2170191597","https://openalex.org/W6633218735"],"related_works":["https://openalex.org/W1482692508","https://openalex.org/W1485027372","https://openalex.org/W2322567826","https://openalex.org/W2145169882","https://openalex.org/W4214929719","https://openalex.org/W2490163188","https://openalex.org/W2241814608","https://openalex.org/W2544030620","https://openalex.org/W2139266362","https://openalex.org/W3023943545"],"abstract_inverted_index":{"An":[0],"adiabatic":[1,20,30,45,83,94],"8-bit":[2],"ripple":[3],"carry":[4],"adder":[5],"is":[6,32,57,71,96],"realized":[7],"in":[8,65],"a":[9,59,92,99,110],"1.2V,":[10],"0.13/spl":[11],"mu/m":[12],"CMOS":[13,36,86],"technology,":[14],"to":[15],"demonstrate":[16],"the":[17,29,41,55,80],"potential":[18],"of":[19,28,43,61,91,112],"logic":[21],"for":[22,79],"low":[23],"power":[24,102],"applications.":[25],"The":[26,88],"layout":[27],"back":[31],"compatible":[33],"with":[34,48],"static":[35,66,85],"standard":[37],"cells.":[38],"This":[39],"enables":[40],"implementation":[42],"large":[44],"circuit":[46],"blocks":[47],"manageable":[49],"design":[50],"complexity.":[51],"At":[52],"f=20":[53,115],"MHz,":[54],"energy":[56,69,89,107],"by":[58,109],"factor":[60,111],"7":[62],"lower":[63],"than":[64],"CMOS,":[67],"and":[68,84],"saving":[70,108],"achievable":[72],"beyond":[73],"f=100MHz.":[74],"Interface":[75],"circuits":[76],"are":[77],"presented":[78],"conversion":[81],"between":[82],"environment.":[87],"efficiency":[90],"complete":[93],"system":[95],"evaluated":[97],"including":[98],"four-phase":[100],"trapezoidal":[101],"clock":[103],"generator,":[104],"obtaining":[105],"an":[106],"6":[113],"at":[114],"MHz.":[116]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}