{"id":"https://openalex.org/W1994299123","doi":"https://doi.org/10.1109/esscirc.2003.1257118","title":"10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 \u03bcm CMOS process","display_name":"10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 \u03bcm CMOS process","publication_year":2004,"publication_date":"2004-07-20","ids":{"openalex":"https://openalex.org/W1994299123","doi":"https://doi.org/10.1109/esscirc.2003.1257118","mag":"1994299123"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2003.1257118","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2003.1257118","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023962265","display_name":"L. Dorrer","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"L. Dorrer","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technol. Austria, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technol. Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034331094","display_name":"F. Kuttner","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"F. Kuttner","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technol. Austria, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technol. Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031697378","display_name":"Andreas Wiesbauer","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"A. Wiesbauer","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technol. Austria, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technol. Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084642569","display_name":"A. Di Giandomenico","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"A. Di Giandomenico","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technol. Austria, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technol. Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046101641","display_name":"Thomas Hartig","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"T. Hartig","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technol. Austria, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technol. Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.7896,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.83161222,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"245","last_page":"248"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6966876983642578},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.6812899708747864},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5275647044181824},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.46410784125328064},{"id":"https://openalex.org/keywords/12-bit","display_name":"12-bit","score":0.4280160069465637},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.35662519931793213},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33290594816207886},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26750531792640686},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08787259459495544}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6966876983642578},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.6812899708747864},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5275647044181824},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.46410784125328064},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.4280160069465637},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.35662519931793213},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33290594816207886},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26750531792640686},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08787259459495544}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2003.1257118","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2003.1257118","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8299999833106995,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2043596240","https://openalex.org/W2044374932","https://openalex.org/W2134981890","https://openalex.org/W2168534592","https://openalex.org/W4244022563"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W2109445684","https://openalex.org/W2081082331","https://openalex.org/W1482165582","https://openalex.org/W1993793393","https://openalex.org/W2045319822","https://openalex.org/W3143318703"],"abstract_inverted_index":{"A":[0,13],"10-bit":[1],"resolution":[2],"continuous-time":[3],"multi-bit":[4,19],"/spl":[5,45,48],"Sigma//spl":[6,49],"Delta/":[7,50],"ADC":[8,51],"for":[9],"UMTS":[10],"is":[11,21],"introduced.":[12],"power-efficient":[14],"implementation":[15],"of":[16],"a":[17,25,57],"third-order":[18],"modulator":[20],"presented.":[22],"By":[23],"using":[24],"feedforward":[26],"architecture":[27],"and":[28],"quantizer":[29],"dynamic":[30],"element":[31],"matching":[32],"the":[33,43],"dissipated":[34],"power":[35],"can":[36],"be":[37],"reduced.":[38],"Clocked":[39],"at":[40,64],"104":[41],"MHz,":[42],"0.12":[44],"mu/m":[46],"CMOS":[47],"achieves":[52],"60dB":[53],"peak":[54],"SNR":[55],"over":[56],"2":[58],"MHz":[59],"signal":[60],"bandwidth,":[61],"consuming":[62],"3mW":[63],"1.2V":[65],"supply.":[66]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
