{"id":"https://openalex.org/W2126111036","doi":"https://doi.org/10.1109/esscir.2005.1541655","title":"A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 &amp;#x03BC;V DC offset","display_name":"A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 &amp;#x03BC;V DC offset","publication_year":2005,"publication_date":"2005-12-10","ids":{"openalex":"https://openalex.org/W2126111036","doi":"https://doi.org/10.1109/esscir.2005.1541655","mag":"2126111036"},"language":"en","primary_location":{"id":"doi:10.1109/esscir.2005.1541655","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscir.2005.1541655","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047268870","display_name":"V. Quiquempoix","orcid":null},"institutions":[{"id":"https://openalex.org/I4210093228","display_name":"Microchip Technology (United States)","ror":"https://ror.org/00kvz1558","country_code":"US","type":"company","lineage":["https://openalex.org/I4210093228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. Quiquempoix","raw_affiliation_strings":["Microchip Technology, Inc., Chandler, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microchip Technology, Inc., Chandler, AZ, USA","institution_ids":["https://openalex.org/I4210093228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054870338","display_name":"P. Deval","orcid":null},"institutions":[{"id":"https://openalex.org/I4210093228","display_name":"Microchip Technology (United States)","ror":"https://ror.org/00kvz1558","country_code":"US","type":"company","lineage":["https://openalex.org/I4210093228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Deval","raw_affiliation_strings":["Microchip Technology, Inc., Chandler, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microchip Technology, Inc., Chandler, AZ, USA","institution_ids":["https://openalex.org/I4210093228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058435585","display_name":"Armando Barreto","orcid":"https://orcid.org/0000-0002-5572-284X"},"institutions":[{"id":"https://openalex.org/I4210093228","display_name":"Microchip Technology (United States)","ror":"https://ror.org/00kvz1558","country_code":"US","type":"company","lineage":["https://openalex.org/I4210093228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Barreto","raw_affiliation_strings":["Microchip Technology, Inc., Chandler, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microchip Technology, Inc., Chandler, AZ, USA","institution_ids":["https://openalex.org/I4210093228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068236294","display_name":"G. Bellini","orcid":null},"institutions":[{"id":"https://openalex.org/I4210093228","display_name":"Microchip Technology (United States)","ror":"https://ror.org/00kvz1558","country_code":"US","type":"company","lineage":["https://openalex.org/I4210093228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Bellini","raw_affiliation_strings":["Microchip Technology, Inc., Chandler, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microchip Technology, Inc., Chandler, AZ, USA","institution_ids":["https://openalex.org/I4210093228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023394359","display_name":"J. Collings","orcid":null},"institutions":[{"id":"https://openalex.org/I4210093228","display_name":"Microchip Technology (United States)","ror":"https://ror.org/00kvz1558","country_code":"US","type":"company","lineage":["https://openalex.org/I4210093228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Collings","raw_affiliation_strings":["Microchip Technology, Inc., Chandler, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microchip Technology, Inc., Chandler, AZ, USA","institution_ids":["https://openalex.org/I4210093228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035151096","display_name":"J. M\u00e1rkus","orcid":null},"institutions":[{"id":"https://openalex.org/I131249849","display_name":"Oregon State University","ror":"https://ror.org/00ysfqy60","country_code":"US","type":"education","lineage":["https://openalex.org/I131249849"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Markus","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA","institution_ids":["https://openalex.org/I131249849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100627082","display_name":"Jo\u00e3o Silva","orcid":"https://orcid.org/0000-0002-3481-6134"},"institutions":[{"id":"https://openalex.org/I131249849","display_name":"Oregon State University","ror":"https://ror.org/00ysfqy60","country_code":"US","type":"education","lineage":["https://openalex.org/I131249849"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Silva","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA","institution_ids":["https://openalex.org/I131249849"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045933551","display_name":"G\u00e1bor C. Temes","orcid":"https://orcid.org/0000-0002-0617-4875"},"institutions":[{"id":"https://openalex.org/I131249849","display_name":"Oregon State University","ror":"https://ror.org/00ysfqy60","country_code":"US","type":"education","lineage":["https://openalex.org/I131249849"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G.C. Temes","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA","institution_ids":["https://openalex.org/I131249849"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.27645051,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"443","last_page":"446"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6033390164375305},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5591986179351807},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5498653650283813},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5125965476036072},{"id":"https://openalex.org/keywords/dc-bias","display_name":"DC bias","score":0.5019590854644775},{"id":"https://openalex.org/keywords/automatic-gain-control","display_name":"Automatic gain control","score":0.4760320484638214},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4398784637451172},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4181063175201416},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.22311905026435852},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22195613384246826},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.2217523753643036},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15410515666007996}],"concepts":[{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6033390164375305},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5591986179351807},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5498653650283813},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5125965476036072},{"id":"https://openalex.org/C88682704","wikidata":"https://www.wikidata.org/wiki/Q2907415","display_name":"DC bias","level":3,"score":0.5019590854644775},{"id":"https://openalex.org/C177502760","wikidata":"https://www.wikidata.org/wiki/Q782524","display_name":"Automatic gain control","level":4,"score":0.4760320484638214},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4398784637451172},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4181063175201416},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.22311905026435852},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22195613384246826},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.2217523753643036},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15410515666007996},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscir.2005.1541655","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscir.2005.1541655","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8199999928474426,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W605564925","https://openalex.org/W1582910515","https://openalex.org/W1984856645","https://openalex.org/W2109256542","https://openalex.org/W2119532882","https://openalex.org/W4301627548"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W2889361259","https://openalex.org/W2115447424","https://openalex.org/W2886612787","https://openalex.org/W1909882508","https://openalex.org/W2093726221","https://openalex.org/W2054505526","https://openalex.org/W2150131487"],"abstract_inverted_index":{"A":[0],"low":[1,13],"power":[2],"22bit":[3],"incremental":[4],"ADC,":[5],"including":[6],"an":[7],"on-chip":[8],"digital":[9],"filter":[10],"and":[11,43,77,91],"a":[12,20,27,36,44,86],"noise/low":[14],"drift":[15],"oscillator,":[16],"was":[17,59],"realized":[18],"in":[19],"0.6-/spl":[21],"mu/m":[22],"CMOS":[23],"process.":[24],"It":[25],"incorporates":[26],"novel":[28,37,45],"offset":[29,68],"cancellation":[30],"scheme":[31],"based":[32],"on":[33,51],"fractal":[34],"sequences,":[35],"high":[38],"accuracy":[39],"gain":[40,73],"control":[41],"circuit,":[42],"reduced":[46],"complexity":[47],"realization":[48],"for":[49],"the":[50,66,72,78],"chip":[52,83],"sine":[53],"filter.":[54],"The":[55,82],"measured":[56],"output":[57],"noise":[58],"0.28":[60],"ppm":[61],"(2.8":[62],"/spl":[63,70,95],"mu/V/sub":[64],"RMS/),":[65],"dc":[67],"2":[69,75],"mu/V,":[71],"error":[74],"ppm,":[76],"INL":[79],"4":[80],"ppm.":[81],"operates":[84],"with":[85],"single":[87],"2.7-5":[88],"V":[89],"supply,":[90],"draws":[92],"only":[93],"125":[94],"mu/A":[96],"current":[97],"during":[98],"conversion.":[99]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
