{"id":"https://openalex.org/W1606327947","doi":"https://doi.org/10.1109/esscir.2004.1356688","title":"A 1.6 GS/s, 16 times interleaved track &amp; hold with 7.6 ENOB in 0.12 \u03bcm CMOS [ADC applications]","display_name":"A 1.6 GS/s, 16 times interleaved track &amp; hold with 7.6 ENOB in 0.12 \u03bcm CMOS [ADC applications]","publication_year":2004,"publication_date":"2004-11-22","ids":{"openalex":"https://openalex.org/W1606327947","doi":"https://doi.org/10.1109/esscir.2004.1356688","mag":"1606327947"},"language":"en","primary_location":{"id":"doi:10.1109/esscir.2004.1356688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscir.2004.1356688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th European Solid-State Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://ris.utwente.nl/ws/files/5330268/01356688.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006216009","display_name":"Simon Louwsma","orcid":null},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"S.M. Louwsma","raw_affiliation_strings":["IC-Design Group, MESA Research Institute, University of Twente, Enschede, Netherlands"],"affiliations":[{"raw_affiliation_string":"IC-Design Group, MESA Research Institute, University of Twente, Enschede, Netherlands","institution_ids":["https://openalex.org/I94624287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039118145","display_name":"E.J.M. van Tuijl","orcid":null},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"E.J.M. van Tuijl","raw_affiliation_strings":["IC-Design Group, MESA Research Institute, University of Twente, Enschede, Netherlands"],"affiliations":[{"raw_affiliation_string":"IC-Design Group, MESA Research Institute, University of Twente, Enschede, Netherlands","institution_ids":["https://openalex.org/I94624287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037982821","display_name":"M. Vertregt","orcid":null},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"M. Vertregt","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033708982","display_name":"P.C.S. Scholtens","orcid":null},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"P.C.S. Scholtens","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035402438","display_name":"Bram Nauta","orcid":"https://orcid.org/0000-0001-6790-5873"},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"B. Nauta","raw_affiliation_strings":["IC-Design Group, MESA Research Institute, University of Twente, Enschede, Netherlands"],"affiliations":[{"raw_affiliation_string":"IC-Design Group, MESA Research Institute, University of Twente, Enschede, Netherlands","institution_ids":["https://openalex.org/I94624287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5006216009"],"corresponding_institution_ids":["https://openalex.org/I94624287"],"apc_list":null,"apc_paid":null,"fwci":1.4867,"has_fulltext":true,"cited_by_count":12,"citation_normalized_percentile":{"value":0.80309123,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"343","last_page":"346"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.7909560799598694},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.7455464005470276},{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.7103939056396484},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7010111808776855},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5986630320549011},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5786862969398499},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.47507041692733765},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.46569904685020447},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44511282444000244},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.411205530166626},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.34586891531944275},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3322814106941223},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2735596299171448}],"concepts":[{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.7909560799598694},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.7455464005470276},{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.7103939056396484},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7010111808776855},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5986630320549011},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5786862969398499},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.47507041692733765},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46569904685020447},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44511282444000244},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.411205530166626},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.34586891531944275},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3322814106941223},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2735596299171448}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/esscir.2004.1356688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscir.2004.1356688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th European Solid-State Circuits Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:ris.utwente.nl:openaire/b3999008-7d39-42e1-b75b-79f7c669415a","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/b3999008-7d39-42e1-b75b-79f7c669415a","pdf_url":"https://ris.utwente.nl/ws/files/5330268/01356688.pdf","source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Louwsma, S M, van Tuijl, A J M, Vertregt, M, Scholtens, P C S & Nauta, B 2004, A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 \u03bcm CMOS. in the 30th European Solid-State Circuits Conference, 2004 (ESSCIRC 2004). IEEE, Leuven, pp. 343-346, 30th European Solid-State Circuits Conference, ESSCIRC 2004, Leuven, Belgium, 21/09/04. https://doi.org/10.1109/ESSCIR.2004.1356688","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:ut:oai:ris.utwente.nl:publications/b3999008-7d39-42e1-b75b-79f7c669415a","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/a-16-gss-16-times-interleaved-track--hold-with-76-enob-in-012-m-cmos(b3999008-7d39-42e1-b75b-79f7c669415a).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"the 30th European Solid-State Circuits Conference, 2004 (ESSCIRC 2004), 343 - 346","raw_type":"info:eu-repo/semantics/conferencepaper"}],"best_oa_location":{"id":"pmh:oai:ris.utwente.nl:openaire/b3999008-7d39-42e1-b75b-79f7c669415a","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/b3999008-7d39-42e1-b75b-79f7c669415a","pdf_url":"https://ris.utwente.nl/ws/files/5330268/01356688.pdf","source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Louwsma, S M, van Tuijl, A J M, Vertregt, M, Scholtens, P C S & Nauta, B 2004, A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 \u03bcm CMOS. in the 30th European Solid-State Circuits Conference, 2004 (ESSCIRC 2004). IEEE, Leuven, pp. 343-346, 30th European Solid-State Circuits Conference, ESSCIRC 2004, Leuven, Belgium, 21/09/04. https://doi.org/10.1109/ESSCIR.2004.1356688","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W1606327947.pdf","grobid_xml":"https://content.openalex.org/works/W1606327947.grobid-xml"},"referenced_works_count":4,"referenced_works":["https://openalex.org/W2078887365","https://openalex.org/W2164013089","https://openalex.org/W2586666711","https://openalex.org/W6684224301"],"related_works":["https://openalex.org/W2759515872","https://openalex.org/W4206356469","https://openalex.org/W2904640696","https://openalex.org/W2511822798","https://openalex.org/W2341231357","https://openalex.org/W2942561789","https://openalex.org/W4390693196","https://openalex.org/W2542593952","https://openalex.org/W2207354743","https://openalex.org/W2082979872"],"abstract_inverted_index":{"A":[0],"1.6":[1],"GS/s":[2],"track":[3],"and":[4,40,57,69],"hold":[5],"circuit":[6,102],"that":[7],"produces":[8],"16":[9],"interleaving,":[10],"100":[11],"MS/s":[12],"voltage":[13],"buffered":[14],"output":[15,67],"signals":[16,68],"is":[17,30,35,43,75,85,103],"presented.":[18],"The":[19,49,83],"achieved":[20],"SFDR":[21],"for":[22],"a":[23,58,88],"950":[24],"MHz":[25],"full":[26],"scale":[27],"input":[28],"signal":[29],"50":[31],"dB.":[32],"Phase":[33],"alignment":[34],"better":[36],"than":[37,45],"2":[38],"ps":[39,47],"aperture":[41],"uncertainty":[42],"less":[44],"0.8":[46],"(RMS).":[48],"chip":[50,84],"includes":[51],"two":[52],"analog":[53],"to":[54,61],"digital":[55],"converters":[56],"switching":[59],"matrix":[60],"accommodate":[62],"measurement":[63],"of":[64,98],"all":[65],"sampled":[66],"their":[70],"timing":[71],"relation.":[72],"Chip":[73],"area":[74],"0.14":[76],"mm/sup":[77],"2/,":[78],"excluding":[79],"the":[80,99],"AD":[81],"converters.":[82],"made":[86],"in":[87],"0.12":[89],"/spl":[90],"mu/m,":[91],"1.2":[92],"V":[93],"CMOS":[94],"process.":[95],"Power":[96],"consumption":[97],"interleaving":[100],"T/H":[101],"32":[104],"mW.":[105]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
