{"id":"https://openalex.org/W1595177594","doi":"https://doi.org/10.1109/esscir.2004.1356683","title":"Adaptive threshold scheme to operate long on-chip buses at the limit of signal integrity","display_name":"Adaptive threshold scheme to operate long on-chip buses at the limit of signal integrity","publication_year":2004,"publication_date":"2004-11-22","ids":{"openalex":"https://openalex.org/W1595177594","doi":"https://doi.org/10.1109/esscir.2004.1356683","mag":"1595177594"},"language":"en","primary_location":{"id":"doi:10.1109/esscir.2004.1356683","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscir.2004.1356683","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th European Solid-State Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053388776","display_name":"A. Katoch","orcid":null},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"A. Katoch","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063706761","display_name":"Manish Garg","orcid":"https://orcid.org/0000-0002-1744-7445"},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"M. Garg","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016753693","display_name":"E. Seevinck","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"E. Seevinck","raw_affiliation_strings":["Circuit Research International, Nijmegen, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research International, Nijmegen, Netherlands","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029272676","display_name":"H. Veendrick","orcid":null},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"H. Veendrick","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.06518823,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"323","last_page":"326"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.7979497909545898},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6221152544021606},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5972599387168884},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5402462482452393},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5375255346298218},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5264264345169067},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.4865978956222534},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.48152145743370056},{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.46012234687805176},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.45995867252349854},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.40632402896881104},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2853206396102905},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21408939361572266},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.21173864603042603},{"id":"https://openalex.org/keywords/electrode","display_name":"Electrode","score":0.11126083135604858}],"concepts":[{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.7979497909545898},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6221152544021606},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5972599387168884},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5402462482452393},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5375255346298218},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5264264345169067},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.4865978956222534},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.48152145743370056},{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.46012234687805176},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.45995867252349854},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.40632402896881104},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2853206396102905},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21408939361572266},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.21173864603042603},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.11126083135604858},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscir.2004.1356683","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscir.2004.1356683","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th European Solid-State Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1533750879","https://openalex.org/W1949448296","https://openalex.org/W1998210153","https://openalex.org/W2127012121"],"related_works":["https://openalex.org/W2167472940","https://openalex.org/W2622826586","https://openalex.org/W2347585086","https://openalex.org/W4280525841","https://openalex.org/W1527953837","https://openalex.org/W2560789951","https://openalex.org/W2042100038","https://openalex.org/W1975375876","https://openalex.org/W4388636991","https://openalex.org/W2548067147"],"abstract_inverted_index":{"As":[0],"the":[1,50,54,74,82,86,96,105,125,135,166],"technology":[2,153],"scales,":[3],"on-chip":[4],"interconnects":[5],"are":[6,78,92],"becoming":[7],"more":[8,10],"and":[9,112],"narrow":[11],"while":[12],"their":[13,20],"height":[14],"is":[15],"not":[16],"scaling":[17],"linearly":[18],"with":[19,30],"width.":[21],"This":[22,128],"leads":[23,39],"to":[24,40,44,81],"an":[25,68],"increase":[26],"in":[27,34,60,62,72,85,118,144,147,154],"coupling":[28],"capacitance":[29],"neighbouring":[31],"wires,":[32],"resulting":[33],"higher":[35],"crosstalk.":[36],"It":[37],"also":[38],"poor":[41],"performance":[42],"due":[43],"a":[45,131,139,148],"sluggish":[46],"RC":[47],"response":[48],"at":[49],"receiving":[51],"end":[52],"of":[53,134,161,165],"wire,":[55],"which":[56,73],"may":[57],"even":[58],"result":[59],"failure":[61],"(very)":[63],"noisy":[64],"environments.":[65],"We":[66],"propose":[67],"adaptive":[69],"threshold":[70],"scheme":[71],"receiver":[75],"switching":[76],"thresholds":[77],"adjusted":[79],"according":[80],"detected":[83],"noise":[84,90,156],"bus":[87,143,167],"lines.":[88],"These":[89],"levels":[91],"dependent":[93],"on":[94,104],"both":[95],"front-end":[97],"processing":[98,107],"(transistor":[99],"performance)":[100],"as":[101,103],"well":[102],"backend":[106],"(metal":[108],"resistance,":[109],"capacitance,":[110],"width":[111],"spacing).":[113],"The":[114,158],"circuit":[115],"technique":[116,129],"presented":[117],"this":[119],"paper":[120],"therefore":[121],"automatically":[122],"compensates":[123],"for":[124,138],"process":[126],"variations.":[127],"offers":[130],"29%":[132],"decrease":[133],"propagation":[136],"delay":[137],"10":[140],"mm":[141],"long":[142],"Metal":[145],"2":[146],"0.13":[149],"/spl":[150],"mu/m":[151],"CMOS":[152],"low":[155],"conditions.":[157],"total":[159],"range":[160],"control":[162],"spans":[163],"75%":[164],"delay.":[168]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}