{"id":"https://openalex.org/W4284878800","doi":"https://doi.org/10.1109/eit53891.2022.9813875","title":"Modular Delay Audio Effect System on FPGA","display_name":"Modular Delay Audio Effect System on FPGA","publication_year":2022,"publication_date":"2022-05-19","ids":{"openalex":"https://openalex.org/W4284878800","doi":"https://doi.org/10.1109/eit53891.2022.9813875"},"language":"en","primary_location":{"id":"doi:10.1109/eit53891.2022.9813875","is_oa":false,"landing_page_url":"https://doi.org/10.1109/eit53891.2022.9813875","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Electro Information Technology (eIT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112844430","display_name":"Dean Cannon","orcid":null},"institutions":[{"id":"https://openalex.org/I180949307","display_name":"Illinois Institute of Technology","ror":"https://ror.org/037t3ry66","country_code":"US","type":"education","lineage":["https://openalex.org/I180949307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Dean Cannon","raw_affiliation_strings":["Illinois Institute of Technology,Embedded Computing and Signal Processing (ECASP) Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A","Department of Electrical and Computer Engineering, Embedded Computing and Signal Processing (ECASP) Research Laboratory, Illinois Institute of Technology, Chicago, IL, U.S.A"],"affiliations":[{"raw_affiliation_string":"Illinois Institute of Technology,Embedded Computing and Signal Processing (ECASP) Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A","institution_ids":["https://openalex.org/I180949307"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Embedded Computing and Signal Processing (ECASP) Research Laboratory, Illinois Institute of Technology, Chicago, IL, U.S.A","institution_ids":["https://openalex.org/I180949307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074654866","display_name":"Tianyang Fang","orcid":"https://orcid.org/0009-0007-8741-0473"},"institutions":[{"id":"https://openalex.org/I180949307","display_name":"Illinois Institute of Technology","ror":"https://ror.org/037t3ry66","country_code":"US","type":"education","lineage":["https://openalex.org/I180949307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tianyang Fang","raw_affiliation_strings":["Illinois Institute of Technology,Embedded Computing and Signal Processing (ECASP) Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A","Department of Electrical and Computer Engineering, Embedded Computing and Signal Processing (ECASP) Research Laboratory, Illinois Institute of Technology, Chicago, IL, U.S.A"],"affiliations":[{"raw_affiliation_string":"Illinois Institute of Technology,Embedded Computing and Signal Processing (ECASP) Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A","institution_ids":["https://openalex.org/I180949307"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Embedded Computing and Signal Processing (ECASP) Research Laboratory, Illinois Institute of Technology, Chicago, IL, U.S.A","institution_ids":["https://openalex.org/I180949307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018536803","display_name":"Jafar Saniie","orcid":"https://orcid.org/0000-0002-2655-6950"},"institutions":[{"id":"https://openalex.org/I180949307","display_name":"Illinois Institute of Technology","ror":"https://ror.org/037t3ry66","country_code":"US","type":"education","lineage":["https://openalex.org/I180949307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jafar Saniie","raw_affiliation_strings":["Illinois Institute of Technology,Embedded Computing and Signal Processing (ECASP) Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A","Department of Electrical and Computer Engineering, Embedded Computing and Signal Processing (ECASP) Research Laboratory, Illinois Institute of Technology, Chicago, IL, U.S.A"],"affiliations":[{"raw_affiliation_string":"Illinois Institute of Technology,Embedded Computing and Signal Processing (ECASP) Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A","institution_ids":["https://openalex.org/I180949307"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Embedded Computing and Signal Processing (ECASP) Research Laboratory, Illinois Institute of Technology, Chicago, IL, U.S.A","institution_ids":["https://openalex.org/I180949307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5112844430"],"corresponding_institution_ids":["https://openalex.org/I180949307"],"apc_list":null,"apc_paid":null,"fwci":0.2972,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.49258385,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"248","last_page":"251"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10860","display_name":"Speech and Audio Processing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10860","display_name":"Speech and Audio Processing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11349","display_name":"Music Technology and Sound Studies","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.8031376600265503},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.776920735836029},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.757802426815033},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.6708890199661255},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.618691086769104},{"id":"https://openalex.org/keywords/erasable-programmable-logic-device","display_name":"Erasable programmable logic device","score":0.59751296043396},{"id":"https://openalex.org/keywords/audio-signal-processing","display_name":"Audio signal processing","score":0.5733304023742676},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5404859781265259},{"id":"https://openalex.org/keywords/simple-programmable-logic-device","display_name":"Simple programmable logic device","score":0.5290207862854004},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5263967514038086},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.47229817509651184},{"id":"https://openalex.org/keywords/control-logic","display_name":"Control logic","score":0.4476288855075836},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.42070233821868896},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4185337424278259},{"id":"https://openalex.org/keywords/audio-signal","display_name":"Audio signal","score":0.3627963662147522},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3611528277397156},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2818763852119446},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.16564002633094788},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12678968906402588}],"concepts":[{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.8031376600265503},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.776920735836029},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.757802426815033},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.6708890199661255},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.618691086769104},{"id":"https://openalex.org/C110050671","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Erasable programmable logic device","level":5,"score":0.59751296043396},{"id":"https://openalex.org/C127220857","wikidata":"https://www.wikidata.org/wiki/Q2719318","display_name":"Audio signal processing","level":4,"score":0.5733304023742676},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5404859781265259},{"id":"https://openalex.org/C34370810","wikidata":"https://www.wikidata.org/wiki/Q3961319","display_name":"Simple programmable logic device","level":5,"score":0.5290207862854004},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5263967514038086},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.47229817509651184},{"id":"https://openalex.org/C2776350369","wikidata":"https://www.wikidata.org/wiki/Q843479","display_name":"Control logic","level":2,"score":0.4476288855075836},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.42070233821868896},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4185337424278259},{"id":"https://openalex.org/C64922751","wikidata":"https://www.wikidata.org/wiki/Q4650799","display_name":"Audio signal","level":3,"score":0.3627963662147522},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3611528277397156},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2818763852119446},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.16564002633094788},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12678968906402588},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/eit53891.2022.9813875","is_oa":false,"landing_page_url":"https://doi.org/10.1109/eit53891.2022.9813875","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Electro Information Technology (eIT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1901491710","https://openalex.org/W2051593293","https://openalex.org/W2096389472","https://openalex.org/W2098408606","https://openalex.org/W2102701013","https://openalex.org/W2152884871","https://openalex.org/W2198958468","https://openalex.org/W2218455004","https://openalex.org/W2756835106","https://openalex.org/W2903765525","https://openalex.org/W6687758127"],"related_works":["https://openalex.org/W1528933814","https://openalex.org/W3013792460","https://openalex.org/W3117015220","https://openalex.org/W1904803855","https://openalex.org/W2376859467","https://openalex.org/W3022525969","https://openalex.org/W4389045693","https://openalex.org/W2519750906","https://openalex.org/W133576369","https://openalex.org/W2466591189"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,7,54],"System-on-Chip":[4],"implementation":[5],"of":[6],"Modular":[8],"delay":[9],"audio":[10,59],"effect":[11,60],"system.":[12],"The":[13,24],"Zedboard":[14],"Zynq":[15,29],"development":[16],"board":[17],"was":[18,31,42],"used":[19,32,43],"to":[20,33,44,56],"implement":[21],"the":[22,28,35,39,47],"design.":[23],"programmable":[25,48],"logic":[26,49],"on":[27,53],"processor":[30],"handle":[34],"signal":[36],"processing":[37,40],"and":[38,50],"system":[41],"communicate":[45],"between":[46],"software":[51],"running":[52],"computer":[55],"control":[57],"different":[58],"parameters":[61],"in":[62],"real-time.":[63]},"counts_by_year":[{"year":2024,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}