{"id":"https://openalex.org/W1679176991","doi":"https://doi.org/10.1109/eit.2015.7293388","title":"Standard cell library characterization for FinFET transistors using BSIM-CMG models","display_name":"Standard cell library characterization for FinFET transistors using BSIM-CMG models","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1679176991","doi":"https://doi.org/10.1109/eit.2015.7293388","mag":"1679176991"},"language":"en","primary_location":{"id":"doi:10.1109/eit.2015.7293388","is_oa":false,"landing_page_url":"https://doi.org/10.1109/eit.2015.7293388","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Conference on Electro/Information Technology (EIT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100444868","display_name":"Yuan Yu","orcid":"https://orcid.org/0000-0002-3148-6600"},"institutions":[{"id":"https://openalex.org/I180949307","display_name":"Illinois Institute of Technology","ror":"https://ror.org/037t3ry66","country_code":"US","type":"education","lineage":["https://openalex.org/I180949307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yu Yuan","raw_affiliation_strings":["Electrical and Computer Engineering Illinois Institute of Technology Chicago, IL","Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Illinois Institute of Technology Chicago, IL","institution_ids":["https://openalex.org/I180949307"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616","institution_ids":["https://openalex.org/I180949307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005424045","display_name":"Cecilia Garcia Martin","orcid":null},"institutions":[{"id":"https://openalex.org/I180949307","display_name":"Illinois Institute of Technology","ror":"https://ror.org/037t3ry66","country_code":"US","type":"education","lineage":["https://openalex.org/I180949307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cecilia Garcia Martin","raw_affiliation_strings":["Electrical and Computer Engineering Illinois Institute of Technology Chicago, IL","Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Illinois Institute of Technology Chicago, IL","institution_ids":["https://openalex.org/I180949307"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616","institution_ids":["https://openalex.org/I180949307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002920793","display_name":"Erdal Oruklu","orcid":"https://orcid.org/0000-0002-2376-8325"},"institutions":[{"id":"https://openalex.org/I180949307","display_name":"Illinois Institute of Technology","ror":"https://ror.org/037t3ry66","country_code":"US","type":"education","lineage":["https://openalex.org/I180949307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Erdal Oruklu","raw_affiliation_strings":["Electrical and Computer Engineering Illinois Institute of Technology Chicago, IL","Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Illinois Institute of Technology Chicago, IL","institution_ids":["https://openalex.org/I180949307"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616","institution_ids":["https://openalex.org/I180949307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4017,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.66308379,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"2014","issue":null,"first_page":"494","last_page":"498"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.7864392995834351},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7594268321990967},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.722866415977478},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5923230648040771},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5731885433197021},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5723757147789001},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5589098930358887},{"id":"https://openalex.org/keywords/successor-cardinal","display_name":"Successor cardinal","score":0.47475913166999817},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36831605434417725},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25522473454475403},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2522386908531189},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.1474922001361847},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10158875584602356},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.08618086576461792},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06482020020484924}],"concepts":[{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.7864392995834351},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7594268321990967},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.722866415977478},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5923230648040771},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5731885433197021},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5723757147789001},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5589098930358887},{"id":"https://openalex.org/C75306776","wikidata":"https://www.wikidata.org/wiki/Q7632662","display_name":"Successor cardinal","level":2,"score":0.47475913166999817},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36831605434417725},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25522473454475403},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2522386908531189},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.1474922001361847},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10158875584602356},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.08618086576461792},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06482020020484924},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/eit.2015.7293388","is_oa":false,"landing_page_url":"https://doi.org/10.1109/eit.2015.7293388","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Conference on Electro/Information Technology (EIT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.49000000953674316}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1489111899","https://openalex.org/W1518236483","https://openalex.org/W2004590961","https://openalex.org/W2026555177","https://openalex.org/W2070786551","https://openalex.org/W2109195618","https://openalex.org/W2120000030","https://openalex.org/W2135407913","https://openalex.org/W2135818056","https://openalex.org/W2142796540","https://openalex.org/W2314747031","https://openalex.org/W6698929447"],"related_works":["https://openalex.org/W2473542051","https://openalex.org/W3123320268","https://openalex.org/W2994519609","https://openalex.org/W2726593096","https://openalex.org/W2054269721","https://openalex.org/W4235459050","https://openalex.org/W2767501615","https://openalex.org/W2390822611","https://openalex.org/W98108296","https://openalex.org/W1986774039"],"abstract_inverted_index":{"In":[0,29],"order":[1],"to":[2,64],"suppress":[3],"the":[4,10,25,34,45,66,69],"short":[5],"channel":[6],"effects":[7],"and":[8,19,50,58,71],"improve":[9],"scalability":[11],"of":[12,24,36,68],"transistors,":[13],"FinFET":[14],"devices":[15],"have":[16],"been":[17],"proposed":[18],"increasingly":[20],"adopted":[21],"as":[22],"successor":[23],"conventional":[26,76],"bulk":[27],"CMOS.":[28],"this":[30],"paper,":[31],"we":[32],"describe":[33],"characterization":[35],"a":[37],"standard":[38],"cell":[39],"library":[40],"based":[41],"on":[42],"FinFET,":[43],"using":[44],"Predictive":[46],"Technology":[47],"Model":[48],"(PTM)":[49],"BSIM-CMG":[51],"models":[52],"recently":[53],"made":[54],"available.":[55],"RTL":[56],"synthesis":[57],"HSPICE":[59],"simulation":[60],"results":[61],"are":[62],"presented":[63],"verify":[65],"correctness":[67],"library,":[70],"performance":[72],"is":[73],"compared":[74],"against":[75],"planar":[77],"CMOS":[78],"technology.":[79]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}