{"id":"https://openalex.org/W2770982203","doi":"https://doi.org/10.1109/ecctd.2017.8093286","title":"Transformation techniques applied to a TaO memristor model to enable stable device simulations","display_name":"Transformation techniques applied to a TaO memristor model to enable stable device simulations","publication_year":2017,"publication_date":"2017-09-01","ids":{"openalex":"https://openalex.org/W2770982203","doi":"https://doi.org/10.1109/ecctd.2017.8093286","mag":"2770982203"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2017.8093286","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2017.8093286","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088436387","display_name":"Vasileios Ntinas","orcid":"https://orcid.org/0000-0002-2367-5567"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Vasileios Ntinas","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023152110","display_name":"Alon Ascoli","orcid":"https://orcid.org/0000-0003-4026-9648"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Alon Ascoli","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012451668","display_name":"Ronald Tetzlaff","orcid":"https://orcid.org/0000-0001-7436-0103"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ronald Tetzlaff","raw_affiliation_strings":["Institute of Circuits and Systems, Faculty of Electrical and Computer Engineering TU Dresden, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Circuits and Systems, Faculty of Electrical and Computer Engineering TU Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008924272","display_name":"Georgios Ch. Sirakoulis","orcid":"https://orcid.org/0000-0001-8240-484X"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Georgios Ch. Sirakoulis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.9883131980895996},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6128707528114319},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5596708059310913},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5386026501655579},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.5155820250511169},{"id":"https://openalex.org/keywords/transformation","display_name":"Transformation (genetics)","score":0.497861385345459},{"id":"https://openalex.org/keywords/convergence","display_name":"Convergence (economics)","score":0.44466203451156616},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4039984941482544},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.3837369382381439},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26875996589660645},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19599425792694092},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12195628881454468}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.9883131980895996},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6128707528114319},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5596708059310913},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5386026501655579},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.5155820250511169},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.497861385345459},{"id":"https://openalex.org/C2777303404","wikidata":"https://www.wikidata.org/wiki/Q759757","display_name":"Convergence (economics)","level":2,"score":0.44466203451156616},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4039984941482544},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.3837369382381439},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26875996589660645},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19599425792694092},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12195628881454468},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2017.8093286","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2017.8093286","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W617097378","https://openalex.org/W1974899890","https://openalex.org/W1986273360","https://openalex.org/W2019061854","https://openalex.org/W2215517785","https://openalex.org/W2320369349","https://openalex.org/W2487935967","https://openalex.org/W2516467421","https://openalex.org/W2555106468","https://openalex.org/W2900178210"],"related_works":["https://openalex.org/W3170109256","https://openalex.org/W2185262500","https://openalex.org/W1543954628","https://openalex.org/W4251693286","https://openalex.org/W4385367273","https://openalex.org/W2797315502","https://openalex.org/W2163054919","https://openalex.org/W3216217287","https://openalex.org/W4252977987","https://openalex.org/W3173413269"],"abstract_inverted_index":{"Given":[0],"the":[1,4,18,32,82,108,116],"complexity":[2],"of":[3,7,20,29,34,53,65,81,103,115,119],"mathematical":[5],"descriptions":[6],"real":[8],"nanodevices":[9],"with":[10],"memristor":[11,54,85],"fingerprints,":[12],"convergence":[13],"issues":[14],"often":[15],"emerge":[16],"in":[17,67,90,121],"simulation":[19,33],"circuits":[21,36],"employing":[22],"memristors,":[23],"even":[24],"for":[25,41],"a":[26,50,58,77,91,111],"limited":[27],"number":[28],"instances.":[30],"Actually":[31],"one-memristor":[35],"may":[37],"also":[38],"be":[39],"troublesome":[40],"some":[42],"inputs":[43],"and/or":[44],"initial":[45],"conditions.":[46],"This":[47],"problem":[48],"prevents":[49],"thorough":[51],"test":[52],"circuit":[55,123],"designs,":[56],"representing":[57],"severe":[59],"obstacle":[60],"towards":[61,110],"an":[62],"extensive":[63,113],"use":[64],"memristors":[66,120],"electronics.":[68],"In":[69],"this":[70,104],"work":[71],"we":[72],"propose":[73],"techniques":[74],"to":[75,97],"transform":[76],"highly-reliable":[78],"physics-based":[79],"model":[80],"Tantalum":[83],"oxide":[84],"from":[86],"Hewlett":[87],"Packard":[88],"Labs":[89],"form":[92],"which":[93],"lends":[94],"itself":[95],"naturally":[96],"stable":[98],"numerical":[99],"simulations.":[100],"The":[101],"results":[102],"study":[105],"shall":[106],"pave":[107],"way":[109],"more":[112],"exploration":[114],"full":[117],"potential":[118],"integrated":[122],"design.":[124]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}