{"id":"https://openalex.org/W2768323116","doi":"https://doi.org/10.1109/ecctd.2017.8093250","title":"Functional chaining mechanism allowing definable models of electronic devices","display_name":"Functional chaining mechanism allowing definable models of electronic devices","publication_year":2017,"publication_date":"2017-09-01","ids":{"openalex":"https://openalex.org/W2768323116","doi":"https://doi.org/10.1109/ecctd.2017.8093250","mag":"2768323116"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2017.8093250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2017.8093250","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109383427","display_name":"David \u010cern\u00fd","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"David Cerny","raw_affiliation_strings":["Department of Radioelectronics Technick\u00e1, Faculty of Electrical Engineering, Czech Republic"],"affiliations":[{"raw_affiliation_string":"Department of Radioelectronics Technick\u00e1, Faculty of Electrical Engineering, Czech Republic","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108194588","display_name":"Josef Dobe\u0161","orcid":null},"institutions":[{"id":"https://openalex.org/I44504214","display_name":"Czech Technical University in Prague","ror":"https://ror.org/03kqpb082","country_code":"CZ","type":"education","lineage":["https://openalex.org/I44504214"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Josef Dobes","raw_affiliation_strings":["Ceske Vysoke Uceni Technicke v Praze, Praha, CZ"],"affiliations":[{"raw_affiliation_string":"Ceske Vysoke Uceni Technicke v Praze, Praha, CZ","institution_ids":["https://openalex.org/I44504214"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026679548","display_name":"V\u00e1clav Navr\u00e1til","orcid":"https://orcid.org/0000-0003-0206-2005"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Vaclav Navratil","raw_affiliation_strings":["Department of Radioelectronics Technick\u00e1, Faculty of Electrical Engineering, Czech Republic"],"affiliations":[{"raw_affiliation_string":"Department of Radioelectronics Technick\u00e1, Faculty of Electrical Engineering, Czech Republic","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5109383427"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2253,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.52577688,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"10","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chaining","display_name":"Chaining","score":0.9193305969238281},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7836513519287109},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6750187873840332},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4977135956287384},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.47069644927978516},{"id":"https://openalex.org/keywords/mechanism","display_name":"Mechanism (biology)","score":0.46224451065063477},{"id":"https://openalex.org/keywords/on-the-fly","display_name":"On the fly","score":0.43598267436027527},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37550899386405945},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3017350435256958},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2864227890968323},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08294668793678284}],"concepts":[{"id":"https://openalex.org/C49020025","wikidata":"https://www.wikidata.org/wiki/Q1059099","display_name":"Chaining","level":2,"score":0.9193305969238281},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7836513519287109},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6750187873840332},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4977135956287384},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.47069644927978516},{"id":"https://openalex.org/C89611455","wikidata":"https://www.wikidata.org/wiki/Q6804646","display_name":"Mechanism (biology)","level":2,"score":0.46224451065063477},{"id":"https://openalex.org/C2781020372","wikidata":"https://www.wikidata.org/wiki/Q533093","display_name":"On the fly","level":2,"score":0.43598267436027527},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37550899386405945},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3017350435256958},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2864227890968323},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08294668793678284},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C542102704","wikidata":"https://www.wikidata.org/wiki/Q183257","display_name":"Psychotherapist","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2017.8093250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2017.8093250","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1971597822","https://openalex.org/W2054943246","https://openalex.org/W2085189212","https://openalex.org/W2132450860","https://openalex.org/W2145481667","https://openalex.org/W2166238335","https://openalex.org/W2189465200","https://openalex.org/W2310854944","https://openalex.org/W4232464611","https://openalex.org/W4238993370","https://openalex.org/W6687322159","https://openalex.org/W7055636934"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W3135165657","https://openalex.org/W1485582195","https://openalex.org/W57337972","https://openalex.org/W1561306903","https://openalex.org/W2563702065","https://openalex.org/W2904996773"],"abstract_inverted_index":{"Fast":[0],"and":[1,31,81,103],"stable":[2],"processing":[3],"optimized":[4],"for":[5,11,18],"given":[6,27],"simulation":[7,25],"problem":[8],"is":[9,16,26],"essential":[10],"any":[12],"modern":[13],"simulator.":[14],"It":[15,74,94],"characteristic":[17],"electronic":[19,37],"circuit":[20,29,86,108],"analysis":[21],"that":[22],"complexity":[23],"of":[24,36,53,64,78,99,107],"by":[28],"size":[30],"used":[32],"device":[33,38,111],"models.":[34,112],"Implementation":[35],"models":[39,80],"in":[40,91],"program":[41],"SPICE":[42],"uses":[43],"traditional":[44],"functional":[45,68,83,100],"paradigm":[46],"allowing":[47],"fast":[48],"computation":[49,69],"but":[50],"further":[51],"modification":[52,63,77],"model":[54],"can":[55],"be":[56],"questionable.":[57],"In":[58],"this":[59],"article,":[60],"we":[61],"propose":[62],"standard":[65,79],"procedure":[66],"inserting":[67],"layer":[70],"into":[71],"the":[72],"process.":[73],"allows":[75],"on-the-fly":[76],"own":[82],"definition":[84,87],"during":[85],"without":[88],"a":[89,97],"loss":[90],"computational":[92],"performance.":[93],"also":[95],"gives":[96],"possibility":[98],"chaining":[101],"mechanism":[102],"improves":[104],"mapping":[105],"performance":[106],"variables":[109],"to":[110]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}