{"id":"https://openalex.org/W1898434315","doi":"https://doi.org/10.1109/ecctd.2015.7300073","title":"A digitally assisted 20MHz–600MHz 16-phase DLL enhanced with dynamic gain control loop","display_name":"A digitally assisted 20MHz–600MHz 16-phase DLL enhanced with dynamic gain control loop","publication_year":2015,"publication_date":"2015-08-01","ids":{"openalex":"https://openalex.org/W1898434315","doi":"https://doi.org/10.1109/ecctd.2015.7300073","mag":"1898434315"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2015.7300073","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2015.7300073","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066544238","display_name":"Arash Hejazi","orcid":"https://orcid.org/0000-0002-5852-5761"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Arash Hejazi","raw_affiliation_strings":["Department of Microelectronics, Engineering Urumi Graduate Institute, Urmia, Iran","Department of Microelectronics Engineering, Urumi Graduate Institute, Urmia, Iran"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Engineering Urumi Graduate Institute, Urmia, Iran","institution_ids":[]},{"raw_affiliation_string":"Department of Microelectronics Engineering, Urumi Graduate Institute, Urmia, Iran","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049930569","display_name":"Sarang Kazeminia","orcid":"https://orcid.org/0000-0002-1435-1667"},"institutions":[{"id":"https://openalex.org/I143150842","display_name":"Urmia University of Technology","ror":"https://ror.org/02v319z25","country_code":"IR","type":"education","lineage":["https://openalex.org/I143150842"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Sarang Kazeminia","raw_affiliation_strings":["Department of Microelectronics, Engineering Urumi Graduate Institute, Urmia, Iran","Department of Electrical Engineering, Urmia University of Technology, Urmia, Iran"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Engineering Urumi Graduate Institute, Urmia, Iran","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical Engineering, Urmia University of Technology, Urmia, Iran","institution_ids":["https://openalex.org/I143150842"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067280950","display_name":"Roozbeh Abdollahi","orcid":null},"institutions":[{"id":"https://openalex.org/I38476204","display_name":"Urmia University","ror":"https://ror.org/032fk0x53","country_code":"IR","type":"education","lineage":["https://openalex.org/I38476204"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Roozbeh Abdollahi","raw_affiliation_strings":["Department of Microelectronics, Engineering Urumi Graduate Institute, Urmia, Iran","[Microelectronics Research Laboratory, Urmia University, Urmia, Iran]"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Engineering Urumi Graduate Institute, Urmia, Iran","institution_ids":[]},{"raw_affiliation_string":"[Microelectronics Research Laboratory, Urmia University, Urmia, Iran]","institution_ids":["https://openalex.org/I38476204"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5066544238"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3946,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65898145,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8267649412155151},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.7196817398071289},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5372225046157837},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.530917227268219},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5136355757713318},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.5027751922607422},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.4926524758338928},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46512269973754883},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.45409199595451355},{"id":"https://openalex.org/keywords/loop-gain","display_name":"Loop gain","score":0.41753655672073364},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3607437014579773},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22447669506072998},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.200423926115036},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19340166449546814},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11968305706977844}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8267649412155151},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.7196817398071289},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5372225046157837},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.530917227268219},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5136355757713318},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.5027751922607422},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.4926524758338928},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46512269973754883},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.45409199595451355},{"id":"https://openalex.org/C199943209","wikidata":"https://www.wikidata.org/wiki/Q1271153","display_name":"Loop gain","level":3,"score":0.41753655672073364},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3607437014579773},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22447669506072998},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.200423926115036},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19340166449546814},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11968305706977844},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2015.7300073","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2015.7300073","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2005120973","https://openalex.org/W2044476652","https://openalex.org/W2090081007","https://openalex.org/W2091269219","https://openalex.org/W2126227985","https://openalex.org/W2133294020","https://openalex.org/W6651706145","https://openalex.org/W6673434222"],"related_works":["https://openalex.org/W2511498111","https://openalex.org/W66112532","https://openalex.org/W2936029881","https://openalex.org/W2072077388","https://openalex.org/W2979324006","https://openalex.org/W2409831949","https://openalex.org/W2369807905","https://openalex.org/W3177439118","https://openalex.org/W4385624389","https://openalex.org/W2119216036"],"abstract_inverted_index":{"In":[0],"the":[1,8,27,39,45,59,84,108,115,129,134,147,152],"proposed":[2],"low-jitter":[3],"delay":[4,81],"locked":[5],"loop":[6,32,85,88,116],"(DLL),":[7],"analog":[9,55,135],"charge":[10],"pump":[11],"(CP)":[12],"is":[13,48,68,89,126,142,174,192,207],"replaced":[14],"by":[15,144,194],"combination":[16],"of":[17,29,41,157,201],"binary":[18],"accumulator":[19],"(ACC)":[20],"and":[21,34,73,96,146,161,167,182,197],"digital-to-analog":[22],"converter":[23],"(DAC)":[24],"to":[25,70,74,92,111,133,178,186],"solve":[26],"problem":[28,40],"achieving":[30],"small":[31,36],"gains":[33],"mirroring":[35],"currents.":[37],"Also,":[38],"leakage":[42,148],"currents":[43,149],"during":[44],"lock":[46,66,97,109,122,202],"state":[47],"removed":[49],"when":[50,83,102],"DAC":[51,145],"provides":[52],"a":[53,76,120,138,214],"fixed":[54,77,139],"voltage":[56,79,141,212],"based":[57],"on":[58,128],"ACC's":[60],"output":[61],"digital":[62],"code.":[63],"A":[64],"simple":[65],"detector":[67],"utilized":[69],"deactivate":[71],"ACC":[72],"generate":[75],"control":[78,94,140,153],"for":[80,199],"elements":[82],"locks.":[86],"Another":[87],"also":[90,183],"applied":[91],"dynamically":[93],"loop-gain":[95,191],"time.":[98,123],"Loop-Gain":[99],"decreases":[100],"(increases)":[101],"DLL":[103],"moves":[104],"toward":[105],"(away":[106],"from)":[107],"condition":[110],"not":[112],"only":[113],"guarantee":[114],"stability":[117],"but,":[118],"provide":[119],"fast":[121],"Smaller":[124],"jitter":[125,156],"expected":[127],"generated":[130],"phases":[131],"comparing":[132],"CPs.":[136],"Here,":[137],"provided":[143],"cannot":[150],"affect":[151],"voltage.":[154],"RMS":[155],"less":[158],"than":[159],"33.5ps":[160],"1.6ps":[162],"are":[163],"achieved":[164],"at":[165,180,188,209],"20MHz":[166,181],"625MHz":[168],"operating":[169],"frequencies,":[170],"respectively.":[171],"Lock":[172],"time":[173],"reduced":[175],"from":[176,184],"38\u03bcs":[177],"2\u03bcs":[179],"900ns":[185],"45ns":[187],"600MHz":[189],"where":[190],"multiplied":[193],"16,":[195],"8":[196],"4":[198],"out":[200],"region.":[203],"Total":[204],"power":[205],"consumption":[206],"7.85mW":[208],"1.8V":[210],"supply":[211],"in":[213],"0.18\u03bcm":[215],"CMOS":[216],"process.":[217]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}