{"id":"https://openalex.org/W2123966129","doi":"https://doi.org/10.1109/ecctd.2011.6043847","title":"A class-AB very low voltage amplifier and sample & hold circuit","display_name":"A class-AB very low voltage amplifier and sample & hold circuit","publication_year":2011,"publication_date":"2011-08-01","ids":{"openalex":"https://openalex.org/W2123966129","doi":"https://doi.org/10.1109/ecctd.2011.6043847","mag":"2123966129"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2011.6043847","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043847","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030782483","display_name":"Francesco Centurelli","orcid":"https://orcid.org/0000-0003-3880-2546"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Francesco Centurelli","raw_affiliation_strings":["Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","Dipartimento di Ingegneria dell'Informazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, ITALY"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipartimento di Ingegneria dell'Informazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, ITALY","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070430111","display_name":"Pietro Monsurr\u00f2","orcid":"https://orcid.org/0000-0002-3821-6566"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Pietro Monsurro","raw_affiliation_strings":["Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","Dipartimento di Ingegneria dell'Informazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, ITALY"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipartimento di Ingegneria dell'Informazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, ITALY","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068452963","display_name":"Alessandro Trifiletti","orcid":"https://orcid.org/0000-0001-6231-4273"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandro Trifiletti","raw_affiliation_strings":["Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","Dipartimento di Ingegneria dell'Informazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, ITALY"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipartimento di Ingegneria dell'Informazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, ITALY","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5030782483"],"corresponding_institution_ids":["https://openalex.org/I861853513"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15689813,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"765","last_page":"768"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.619817852973938},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5918506383895874},{"id":"https://openalex.org/keywords/power-supply-rejection-ratio","display_name":"Power supply rejection ratio","score":0.5230863094329834},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.49997997283935547},{"id":"https://openalex.org/keywords/direct-coupled-amplifier","display_name":"Direct-coupled amplifier","score":0.49695780873298645},{"id":"https://openalex.org/keywords/sample-and-hold","display_name":"Sample and hold","score":0.465471476316452},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.43828362226486206},{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"Operational transconductance amplifier","score":0.4233020544052124},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4221835732460022},{"id":"https://openalex.org/keywords/fully-differential-amplifier","display_name":"Fully differential amplifier","score":0.41243934631347656},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.39058277010917664},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2968359887599945}],"concepts":[{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.619817852973938},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5918506383895874},{"id":"https://openalex.org/C15892472","wikidata":"https://www.wikidata.org/wiki/Q1482413","display_name":"Power supply rejection ratio","level":4,"score":0.5230863094329834},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.49997997283935547},{"id":"https://openalex.org/C172218469","wikidata":"https://www.wikidata.org/wiki/Q4477697","display_name":"Direct-coupled amplifier","level":5,"score":0.49695780873298645},{"id":"https://openalex.org/C206565188","wikidata":"https://www.wikidata.org/wiki/Q836482","display_name":"Sample and hold","level":3,"score":0.465471476316452},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.43828362226486206},{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.4233020544052124},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4221835732460022},{"id":"https://openalex.org/C189184530","wikidata":"https://www.wikidata.org/wiki/Q5508342","display_name":"Fully differential amplifier","level":5,"score":0.41243934631347656},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.39058277010917664},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2968359887599945}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ecctd.2011.6043847","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043847","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/395193","is_oa":false,"landing_page_url":"http://hdl.handle.net/11573/395193","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8899999856948853,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1540425631","https://openalex.org/W1979902309","https://openalex.org/W2096668447","https://openalex.org/W2157637127","https://openalex.org/W2160509435","https://openalex.org/W6632321633"],"related_works":["https://openalex.org/W2098517669","https://openalex.org/W3106125200","https://openalex.org/W2394294554","https://openalex.org/W2379608080","https://openalex.org/W2376105273","https://openalex.org/W2371268555","https://openalex.org/W2367546301","https://openalex.org/W2182873022","https://openalex.org/W2167952956","https://openalex.org/W2382435314"],"abstract_inverted_index":{"In":[0],"this":[1,35],"paper":[2],"we":[3],"present":[4],"a":[5,56,67,82,94,123,141,172,183],"low-power":[6,54,96],"low-voltage":[7,95],"class-AB":[8],"amplifier":[9,45,88,121],"with":[10,171],"rail-to-rail":[11],"output":[12],"swing":[13],"capable":[14],"of":[15,23,43,70,81,112,125,145,185],"operating":[16],"from":[17],"0.5":[18,129,151,173],"V":[19,22,174],"to":[20,92,134,168],"1.0":[21,138,159],"supply":[24,58,175,200],"voltage,":[25],"and":[26,40,72,140,176,202],"two":[27,64,162],"Sample":[28],"&":[29],"Hold":[30],"(SHA)":[31],"circuits":[32],"based":[33],"on":[34,47],"amplifier.":[36],"The":[37,63,101,119,161],"bias":[38],"current":[39],"the":[41,44,48,75,78,86,109,113,189,199],"bandwidth":[42],"depend":[46],"voltage":[49,59,201],"supply,":[50],"so":[51],"that":[52],"for":[53],"operation":[55],"low":[57],"can":[60,164,195],"be":[61,90,196],"used.":[62],"SHAs":[65,163],"have":[66],"nominal":[68],"gain":[69,124,143],"one":[71],"two:":[73],"as":[74],"latter":[76],"is":[77],"basic":[79],"stage":[80],"Multiplying":[83],"DAC":[84],"(MDAC),":[85],"proposed":[87],"may":[89],"used":[91],"obtain":[93],"pipeline":[97],"Analog-to-Digital":[98],"Converter":[99],"(ADC).":[100],"design":[102],"has":[103,122],"been":[104],"validated":[105],"by":[106],"simulations":[107],"using":[108],"technology":[110],"models":[111],"STMicroelectronics":[114],"65":[115],"nm":[116],"CMOS":[117],"process.":[118],"two-stage":[120],"26":[126],"dB":[127,136,187],"at":[128,137,150,158,166],"V,":[130,139,152],"which":[131,153],"increases":[132,154],"up":[133,167],"37":[135],"unity":[142],"frequency":[144],"14":[146],"MHz":[147],"when":[148],"supplied":[149],"beyond":[155],"1":[156],"GHz":[157],"V.":[160],"work":[165],"5":[169],"MSps":[170],"consume":[177],"less":[178],"than":[179],"2":[180],"\u03bcW,":[181],"showing":[182],"THD":[184],"-56":[186],"throughout":[188],"Nyquist":[190],"band.":[191],"Higher":[192],"sampling":[193],"frequencies":[194],"obtained":[197],"increasing":[198],"power":[203],"consumption.":[204]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}