{"id":"https://openalex.org/W2155925921","doi":"https://doi.org/10.1109/ecctd.2011.6043846","title":"A very low-voltage differential amplifier for opamp design","display_name":"A very low-voltage differential amplifier for opamp design","publication_year":2011,"publication_date":"2011-08-01","ids":{"openalex":"https://openalex.org/W2155925921","doi":"https://doi.org/10.1109/ecctd.2011.6043846","mag":"2155925921"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2011.6043846","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043846","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030782483","display_name":"Francesco Centurelli","orcid":"https://orcid.org/0000-0003-3880-2546"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Francesco Centurelli","raw_affiliation_strings":["Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070430111","display_name":"Pietro Monsurr\u00f2","orcid":"https://orcid.org/0000-0002-3821-6566"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Pietro Monsurro","raw_affiliation_strings":["Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Scotti","raw_affiliation_strings":["Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068452963","display_name":"Alessandro Trifiletti","orcid":"https://orcid.org/0000-0001-6231-4273"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandro Trifiletti","raw_affiliation_strings":["Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Elettronica e Telecomunicazioni, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5030782483"],"corresponding_institution_ids":["https://openalex.org/I861853513"],"apc_list":null,"apc_paid":null,"fwci":0.2099,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.59818485,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"81","issue":null,"first_page":"769","last_page":"772"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.7985072135925293},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5664094686508179},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5599974393844604},{"id":"https://openalex.org/keywords/intermodulation","display_name":"Intermodulation","score":0.5365766286849976},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5027341842651367},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.4899255633354187},{"id":"https://openalex.org/keywords/common-mode-signal","display_name":"Common-mode signal","score":0.4561336636543274},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.44591641426086426},{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"Operational transconductance amplifier","score":0.4170345067977905},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.40608155727386475},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3787359595298767},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.37317153811454773},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.36940085887908936},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.36092913150787354},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.2929953932762146},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.0827169120311737}],"concepts":[{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.7985072135925293},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5664094686508179},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5599974393844604},{"id":"https://openalex.org/C11773624","wikidata":"https://www.wikidata.org/wiki/Q2142232","display_name":"Intermodulation","level":4,"score":0.5365766286849976},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5027341842651367},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.4899255633354187},{"id":"https://openalex.org/C189714311","wikidata":"https://www.wikidata.org/wiki/Q1530371","display_name":"Common-mode signal","level":4,"score":0.4561336636543274},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.44591641426086426},{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.4170345067977905},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.40608155727386475},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3787359595298767},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.37317153811454773},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.36940085887908936},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.36092913150787354},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.2929953932762146},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.0827169120311737},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ecctd.2011.6043846","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043846","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/498519","is_oa":false,"landing_page_url":"http://hdl.handle.net/11573/498519","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7799999713897705,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2031457512","https://openalex.org/W2036779818","https://openalex.org/W2059631291","https://openalex.org/W2080615209","https://openalex.org/W2096668447","https://openalex.org/W2114254364","https://openalex.org/W2131189523","https://openalex.org/W2157637127","https://openalex.org/W2160509435"],"related_works":["https://openalex.org/W2379608080","https://openalex.org/W2080717696","https://openalex.org/W2045486262","https://openalex.org/W2130598956","https://openalex.org/W2384930422","https://openalex.org/W1553003654","https://openalex.org/W2954565801","https://openalex.org/W3106125200","https://openalex.org/W2394349332","https://openalex.org/W2921550143"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"present":[4],"a":[5,34,40,60,109,116],"differential":[6],"stage":[7,15,97],"suitable":[8],"to":[9,27,67,115],"be":[10,82],"used":[11],"as":[12,103,105],"the":[13,29,44,53,57,94],"input":[14,25,31,46,96],"of":[16,33,52,59],"rail-to-rail":[17],"very":[18],"low-voltage":[19],"opamps.":[20],"The":[21,49],"topology":[22],"exploits":[23],"an":[24],"level-shifter":[26],"keep":[28],"common-mode":[30,47],"voltage":[32],"pseudo-differential":[35,118],"pair":[36],"constant,":[37],"thus":[38],"providing":[39],"constant":[41],"gain":[42],"over":[43],"whole":[45],"range.":[48],"main":[50],"drawback":[51],"proposed":[54,95],"solution":[55],"is":[56,98],"need":[58],"switched-capacitor":[61],"level-shifter,":[62],"that":[63],"can":[64,81],"give":[65],"rise":[66],"some":[68],"clock":[69,79],"feedthrough":[70],"in":[71,89],"continuous-time":[72],"applications.":[73],"However":[74],"good":[75],"linearity":[76,111],"with":[77,108,113],"limited":[78],"intermodulation":[80],"achieved":[83],"by":[84],"careful":[85],"design.":[86],"An":[87],"opamp":[88],"65-nm":[90],"CMOS":[91],"technology":[92],"featuring":[93],"operational":[99],"for":[100],"supply":[101],"voltages":[102],"low":[104],"0.5":[106],"V,":[107],"net":[110],"improvement":[112],"respect":[114],"simple":[117],"stage.":[119]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
