{"id":"https://openalex.org/W2130946862","doi":"https://doi.org/10.1109/ecctd.2011.6043817","title":"Tolerance maximisation in fault diagnosis of analogue electronic circuits","display_name":"Tolerance maximisation in fault diagnosis of analogue electronic circuits","publication_year":2011,"publication_date":"2011-08-01","ids":{"openalex":"https://openalex.org/W2130946862","doi":"https://doi.org/10.1109/ecctd.2011.6043817","mag":"2130946862"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2011.6043817","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043817","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080418501","display_name":"Lukas Chruszczyk","orcid":"https://orcid.org/0000-0001-9812-8851"},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Lukas Chruszczyk","raw_affiliation_strings":["Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Gliwice, Poland","Faculty of Automatic Control Electronics and Computer Science Silesian University of Technology Gliwice Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]},{"raw_affiliation_string":"Faculty of Automatic Control Electronics and Computer Science Silesian University of Technology Gliwice Poland","institution_ids":["https://openalex.org/I119004910"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045068722","display_name":"Damian Grzechca","orcid":"https://orcid.org/0000-0003-1391-8809"},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Damian Grzechca","raw_affiliation_strings":["Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Gliwice, Poland","Faculty of Automatic Control Electronics and Computer Science Silesian University of Technology Gliwice Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]},{"raw_affiliation_string":"Faculty of Automatic Control Electronics and Computer Science Silesian University of Technology Gliwice Poland","institution_ids":["https://openalex.org/I119004910"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I119004910"],"apc_list":null,"apc_paid":null,"fwci":0.57,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.63312102,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"144","issue":null,"first_page":"881","last_page":"884"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6549639105796814},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5231627225875854},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.4794934391975403},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4752117097377777},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3482108414173126},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18550732731819153},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.13566258549690247},{"id":"https://openalex.org/keywords/geology","display_name":"Geology","score":0.07393425703048706}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6549639105796814},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5231627225875854},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.4794934391975403},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4752117097377777},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3482108414173126},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18550732731819153},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.13566258549690247},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.07393425703048706},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ecctd.2011.6043817","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043817","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},{"id":"mag:2172282929","is_oa":false,"landing_page_url":"http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.baztech-article-PWA7-0052-0037","pdf_url":null,"source":{"id":"https://openalex.org/S197975706","display_name":"PRZEGL\u0104D ELEKTROTECHNICZNY","issn_l":"0033-2097","issn":["0033-2097","2449-9544"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310317252","host_organization_name":"Stowarzyszenie Elektryk\u00f3w Polskich","host_organization_lineage":["https://openalex.org/P4310317252"],"host_organization_lineage_names":["Stowarzyszenie Elektryk\u00f3w Polskich"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":"PRZEGL\u0104D ELEKTROTECHNICZNY","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W569179405","https://openalex.org/W1483572724","https://openalex.org/W1822483930","https://openalex.org/W1924227955","https://openalex.org/W1962694762","https://openalex.org/W1979410517","https://openalex.org/W1999141085","https://openalex.org/W2094897492","https://openalex.org/W2133229660","https://openalex.org/W2142851545","https://openalex.org/W2149019934","https://openalex.org/W2161093625","https://openalex.org/W3011460294","https://openalex.org/W3023540311","https://openalex.org/W6683880775","https://openalex.org/W6775516866","https://openalex.org/W7000866259"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052","https://openalex.org/W4402327032","https://openalex.org/W2382290278"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"maximisation":[3],"of":[4,12,19,49],"components":[5],"tolerance":[6],"together":[7],"with":[8],"finding":[9],"optimal":[10],"frequency":[11],"a":[13,50],"periodic":[14],"excitation":[15],"in":[16,36],"fault":[17],"diagnosis":[18,29],"analogue":[20],"electronic":[21],"circuits.":[22],"Additionally":[23],"classical":[24],"two-stage":[25],"\u201cdetection":[26],"\u2192":[27],"location\u201d":[28],"sequence":[30],"is":[31],"merged":[32],"into":[33],"single":[34],"step":[35],"order":[37],"to":[38],"reduce":[39],"test":[40],"time.":[41],"Presented":[42],"optimisation":[43],"problems":[44],"are":[45],"solved":[46],"by":[47],"means":[48],"genetic":[51],"algorithm.":[52]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
