{"id":"https://openalex.org/W2109090021","doi":"https://doi.org/10.1109/ecctd.2011.6043309","title":"CMOS latch based on a class-AB transconductor","display_name":"CMOS latch based on a class-AB transconductor","publication_year":2011,"publication_date":"2011-08-01","ids":{"openalex":"https://openalex.org/W2109090021","doi":"https://doi.org/10.1109/ecctd.2011.6043309","mag":"2109090021"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2011.6043309","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043309","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031463119","display_name":"Carlos A. De La Cruz\u2010Blas","orcid":"https://orcid.org/0000-0002-4136-5079"},"institutions":[{"id":"https://openalex.org/I175051016","display_name":"Universidad P\u00fablica de Navarra (UPNA)","ror":"https://ror.org/02z0cah89","country_code":"ES","type":"education","lineage":["https://openalex.org/I175051016"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Carlos A. de la Cruz Blas","raw_affiliation_strings":["IEE Department, Public University of Navarre, Pamplona, Spain","IEE Department Public University of Navarre, Pamplona Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IEE Department, Public University of Navarre, Pamplona, Spain","institution_ids":["https://openalex.org/I175051016"]},{"raw_affiliation_string":"IEE Department Public University of Navarre, Pamplona Spain","institution_ids":["https://openalex.org/I175051016"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012017882","display_name":"Michael M. Green","orcid":"https://orcid.org/0000-0003-4134-1875"},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael M. Green","raw_affiliation_strings":["ECE Department, University of California Irvine, CA, USA","ECE Department University of California Irvine, California USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE Department, University of California Irvine, CA, USA","institution_ids":["https://openalex.org/I204250578"]},{"raw_affiliation_string":"ECE Department University of California Irvine, California USA","institution_ids":["https://openalex.org/I204250578"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.23655851,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"170","last_page":"173"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8010927438735962},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.7663213014602661},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6377464532852173},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.481270968914032},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4571644067764282},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4531739354133606},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.381169855594635},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3173636794090271},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21934467554092407}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8010927438735962},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.7663213014602661},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6377464532852173},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.481270968914032},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4571644067764282},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4531739354133606},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.381169855594635},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3173636794090271},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21934467554092407}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2011.6043309","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2011.6043309","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1965081201","https://openalex.org/W2034199233","https://openalex.org/W2092132571","https://openalex.org/W2095480917","https://openalex.org/W2096722917","https://openalex.org/W2119628033","https://openalex.org/W2131928065","https://openalex.org/W2138620184","https://openalex.org/W2151148290","https://openalex.org/W2153546630","https://openalex.org/W2166885897"],"related_works":["https://openalex.org/W2044867305","https://openalex.org/W3161676474","https://openalex.org/W2049207285","https://openalex.org/W1965493748","https://openalex.org/W2389800961","https://openalex.org/W2922086473","https://openalex.org/W1995389502","https://openalex.org/W4385452214","https://openalex.org/W2109445684","https://openalex.org/W2039299085"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"a":[3,10,14,23,36,91],"novel":[4],"CMOS":[5,93],"latch":[6,18,57,72],"is":[7,20],"designed":[8],"using":[9,22,90],"class-AB":[11,68],"transconductor":[12,33],"as":[13],"core.":[15],"The":[16,55],"static":[17],"behavior":[19],"studied":[21],"homotopy":[24],"method":[25],"which":[26],"allows":[27],"highlighting":[28],"sufficient":[29],"conditions":[30,40],"for":[31,47,79],"the":[32,48,71,101],"to":[34,99],"become":[35],"latch.":[37],"These":[38],"last":[39],"are":[41,95],"general":[42],"and":[43,53,83,104],"can":[44,76],"be":[45,77],"used":[46,78],"design":[49],"of":[50,67],"new":[51],"latches":[52],"comparators.":[54],"proposed":[56,102],"features":[58],"high":[59,63],"speed":[60],"together":[61],"with":[62,73],"power":[64],"efficiency":[65],"inherited":[66],"transconductor.":[69],"Besides,":[70],"low-impedance":[74],"loads":[75],"low-swing":[80],"mixed-signal":[81],"applications":[82],"current-mode":[84],"differential":[85],"logic":[86],"circuits.":[87,105],"Simulation":[88],"results":[89],"0.18u":[92],"technology":[94],"presented":[96],"in":[97],"order":[98],"support":[100],"study":[103]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
