{"id":"https://openalex.org/W2134811846","doi":"https://doi.org/10.1109/ecctd.2009.5274946","title":"A pixel-parallel cellular processor array in a stacked three-layer 3D silicon-on-insulator technology","display_name":"A pixel-parallel cellular processor array in a stacked three-layer 3D silicon-on-insulator technology","publication_year":2009,"publication_date":"2009-08-01","ids":{"openalex":"https://openalex.org/W2134811846","doi":"https://doi.org/10.1109/ecctd.2009.5274946","mag":"2134811846"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2009.5274946","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2009.5274946","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057658631","display_name":"Piotr Dudek","orcid":"https://orcid.org/0000-0002-6511-6165"},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Piotr Dudek","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University of Manchester, Institute of Science and Technology, UK","School of Electrical and Electronic, Engineering, The University of Manchester, United Kingdom"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University of Manchester, Institute of Science and Technology, UK","institution_ids":["https://openalex.org/I28407311"]},{"raw_affiliation_string":"School of Electrical and Electronic, Engineering, The University of Manchester, United Kingdom","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034024301","display_name":"Alexey Lopich","orcid":null},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Alexey Lopich","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University of Manchester, Institute of Science and Technology, UK","School of Electrical and Electronic, Engineering, The University of Manchester, United Kingdom"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University of Manchester, Institute of Science and Technology, UK","institution_ids":["https://openalex.org/I28407311"]},{"raw_affiliation_string":"School of Electrical and Electronic, Engineering, The University of Manchester, United Kingdom","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5107412730","display_name":"Viktor Gruev","orcid":null},"institutions":[{"id":"https://openalex.org/I204465549","display_name":"Washington University in St. Louis","ror":"https://ror.org/01yc7t268","country_code":"US","type":"education","lineage":["https://openalex.org/I204465549"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Viktor Gruev","raw_affiliation_strings":["Department of Computer Science and Engineering, Washington University of Saint Louis, MO, USA","Department of Computer Science and Engineering Washington University in St. Louis Missouri, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Washington University of Saint Louis, MO, USA","institution_ids":["https://openalex.org/I204465549"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Washington University in St. Louis Missouri, USA","institution_ids":["https://openalex.org/I204465549"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.1362,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.88133774,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"1","issue":null,"first_page":"193","last_page":"196"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.6390894055366516},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6155436038970947},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5406844615936279},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.4952968657016754},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4880903959274292},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.45457738637924194},{"id":"https://openalex.org/keywords/image-sensor","display_name":"Image sensor","score":0.4480222463607788},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4318251609802246},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.42589038610458374},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.41154640913009644},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3909875750541687},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.36280539631843567},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.333848237991333},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29023319482803345},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.23419776558876038},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22205224633216858},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.1309036910533905}],"concepts":[{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.6390894055366516},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6155436038970947},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5406844615936279},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.4952968657016754},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4880903959274292},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45457738637924194},{"id":"https://openalex.org/C76935873","wikidata":"https://www.wikidata.org/wiki/Q209121","display_name":"Image sensor","level":2,"score":0.4480222463607788},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4318251609802246},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.42589038610458374},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.41154640913009644},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3909875750541687},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.36280539631843567},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.333848237991333},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29023319482803345},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.23419776558876038},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22205224633216858},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.1309036910533905},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/ecctd.2009.5274946","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2009.5274946","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/b08dd838-dcec-48b3-a3d5-efe582d8d01c","is_oa":false,"landing_page_url":"https://research.manchester.ac.uk/en/publications/b08dd838-dcec-48b3-a3d5-efe582d8d01c","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Dudek, P, Lopich, A & Gruev, V 2009, A pixel-parallel cellular processor array in a stacked three-layer 3D silicon-on-insulator technology. in ECCTD 2009 - European Conference on Circuit Theory and Design Conference Program|ECCTD - Eur. Conf. Circuit Theory Des. Conf. Program. pp. 193-196, ECCTD 2009 - European Conference on Circuit Theory and Design Conference Program, Antalya, 1/07/09. https://doi.org/10.1109/ECCTD.2009.5274946","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.705.1733","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.705.1733","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://personalpages.manchester.ac.uk/staff/p.dudek/papers/dudek-ecctd2009.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6399999856948853}],"awards":[{"id":"https://openalex.org/G1939363929","display_name":null,"funder_award_id":"EP/H017453/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1513426357","https://openalex.org/W1570173134","https://openalex.org/W1903405547","https://openalex.org/W2088210557","https://openalex.org/W2097988027","https://openalex.org/W2104386725","https://openalex.org/W2108532511","https://openalex.org/W2110526812","https://openalex.org/W2114580677","https://openalex.org/W2117148079","https://openalex.org/W2127968420","https://openalex.org/W2129076589","https://openalex.org/W2133186977","https://openalex.org/W2139155713","https://openalex.org/W2147137844","https://openalex.org/W2155433679","https://openalex.org/W2162910395","https://openalex.org/W2165352122","https://openalex.org/W2166087506","https://openalex.org/W2539069741","https://openalex.org/W2610639187","https://openalex.org/W2611660823","https://openalex.org/W4205749273","https://openalex.org/W6683135802","https://openalex.org/W6737289691"],"related_works":["https://openalex.org/W2022123780","https://openalex.org/W2349576212","https://openalex.org/W1981776476","https://openalex.org/W2352535872","https://openalex.org/W1590693222","https://openalex.org/W2382967348","https://openalex.org/W2334823507","https://openalex.org/W2107073676","https://openalex.org/W2565551736","https://openalex.org/W2542675020"],"abstract_inverted_index":{"This":[0,26],"paper":[1],"presents":[2],"the":[3,70,75,93,99,129,162],"design":[4,157],"of":[5,89,131],"a":[6,13,31,58],"vertically-integrated":[7],"image":[8,43,71],"sensor/processor":[9],"device,":[10],"implemented":[11,126],"in":[12,65,133,161],"fully":[14],"stacked":[15],"3-layer":[16],"three-dimensional":[17],"(3D)":[18],"silicon":[19,39],"on":[20],"insulator":[21],"(SOI)":[22],"150nm":[23],"CMOS":[24],"technology.":[25,135],"prototype":[27,137],"'vision":[28],"chip'":[29],"contains":[30],"32":[32,34],"times":[33,142,148],"pixel-parallel":[35],"processor":[36,61,107],"array.":[37],"Three":[38],"layers":[40,56],"contain":[41],"current-mode":[42,45],"sensors,":[44],"analogue":[46,110],"circuits":[47],"and":[48,68,92,111,115,118,155],"digital":[49],"logic":[50,119],"circuits,":[51],"respectively.":[52],"The":[53,81,106,136,153],"two":[54],"bottom":[55],"form":[57],"mixed-mode":[59],"cellular":[60],"array,":[62],"which":[63],"operates":[64],"SIMD":[66],"mode,":[67],"processes":[69],"data":[72],"acquired":[73],"by":[74,87],"top-layer":[76],"backside":[77],"illuminated":[78],"photosensor":[79],"circuit.":[80],"intra-processor":[82],"inter-layer":[83],"communication":[84],"is":[85,95],"achieved":[86],"means":[88],"through-silicon":[90],"vias,":[91],"system":[94],"partitioned":[96],"to":[97,127],"minimise":[98],"area":[100],"overhead":[101],"associated":[102],"with":[103,145],"this":[104],"communication.":[105],"comprises":[108],"4":[109],"12":[112],"binary":[113],"registers,":[114],"supports":[116],"arithmetic":[117],"operations.":[120],"Various":[121],"sensor":[122],"structures":[123],"have":[124],"been":[125],"evaluate":[128],"efficiency":[130],"photo-sensing":[132],"SOI":[134],"circuit":[138,156],"measures":[139],"2":[140,143],"mm":[141],"mm,":[144],"30":[146,149],"mum":[147,150],"pixel":[151],"pitch.":[152],"architecture":[154],"issues":[158],"are":[159],"presented":[160],"paper.":[163]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
