{"id":"https://openalex.org/W2156893787","doi":"https://doi.org/10.1109/ecctd.2007.4529705","title":"A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplier","display_name":"A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplier","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W2156893787","doi":"https://doi.org/10.1109/ecctd.2007.4529705","mag":"2156893787"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2007.4529705","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529705","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027181527","display_name":"Chutham Sawigun","orcid":"https://orcid.org/0000-0001-7179-0343"},"institutions":[{"id":"https://openalex.org/I4322889","display_name":"Mahanakorn University of Technology","ror":"https://ror.org/05qebwp08","country_code":"TH","type":"education","lineage":["https://openalex.org/I4322889"]}],"countries":["TH"],"is_corresponding":true,"raw_author_name":"Chutham Sawigun","raw_affiliation_strings":["Department of Electronic Engineering, Mahanakom University of Technology, Bangkok, Thailand"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Mahanakom University of Technology, Bangkok, Thailand","institution_ids":["https://openalex.org/I4322889"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012493816","display_name":"Andreas Demosthenous","orcid":"https://orcid.org/0000-0003-0623-963X"},"institutions":[{"id":"https://openalex.org/I45129253","display_name":"University College London","ror":"https://ror.org/02jx3x895","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I45129253"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Andreas Demosthenous","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University College London, London, UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University College London, London, UK","institution_ids":["https://openalex.org/I45129253"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101520559","display_name":"Dipankar Pal","orcid":"https://orcid.org/0000-0001-8514-0077"},"institutions":[{"id":"https://openalex.org/I45129253","display_name":"University College London","ror":"https://ror.org/02jx3x895","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I45129253"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Dipankar Pal","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University College London, London, UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University College London, London, UK","institution_ids":["https://openalex.org/I45129253"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5027181527"],"corresponding_institution_ids":["https://openalex.org/I4322889"],"apc_list":null,"apc_paid":null,"fwci":1.617,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.84147155,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"751","last_page":"754"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.8129408359527588},{"id":"https://openalex.org/keywords/voltage-multiplier","display_name":"Voltage multiplier","score":0.7019617557525635},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6996491551399231},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.6851447820663452},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5458611845970154},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.511555016040802},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.48271462321281433},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.47817403078079224},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4040878415107727},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3301883041858673},{"id":"https://openalex.org/keywords/dropout-voltage","display_name":"Dropout voltage","score":0.27923405170440674},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.2141614854335785},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20670634508132935},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.19835150241851807},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.12319746613502502}],"concepts":[{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.8129408359527588},{"id":"https://openalex.org/C85663104","wikidata":"https://www.wikidata.org/wiki/Q1559714","display_name":"Voltage multiplier","level":5,"score":0.7019617557525635},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6996491551399231},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.6851447820663452},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5458611845970154},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.511555016040802},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48271462321281433},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.47817403078079224},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4040878415107727},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3301883041858673},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.27923405170440674},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.2141614854335785},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20670634508132935},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.19835150241851807},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.12319746613502502},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ecctd.2007.4529705","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529705","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},{"id":"pmh:oai:eprints.ucl.ac.uk.OAI2:165103","is_oa":false,"landing_page_url":"http://discovery.ucl.ac.uk/165103/","pdf_url":null,"source":{"id":"https://openalex.org/S4306400024","display_name":"UCL Discovery (University College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45129253","host_organization_name":"University College London","host_organization_lineage":["https://openalex.org/I45129253"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"     In:   (Proceedings) 18th European Conference on Circuit Theory Design. (pp. 751-+).  IEEE (2007)     ","raw_type":"Proceedings paper"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1681801084","https://openalex.org/W1943892926","https://openalex.org/W2098348528","https://openalex.org/W2105515986","https://openalex.org/W2132752405","https://openalex.org/W2139277081","https://openalex.org/W2167284206","https://openalex.org/W2196670359","https://openalex.org/W6674778426","https://openalex.org/W6679245321"],"related_works":["https://openalex.org/W2089088242","https://openalex.org/W2145104756","https://openalex.org/W2343687813","https://openalex.org/W2113697565","https://openalex.org/W2760424941","https://openalex.org/W1965508384","https://openalex.org/W2997198572","https://openalex.org/W2117233677","https://openalex.org/W2165446669","https://openalex.org/W2547058433"],"abstract_inverted_index":{"A":[0],"compact":[1],"four-quadrant":[2],"analog":[3],"multiplier":[4,31,51],"circuit":[5,14,76],"using":[6,55],"strong":[7],"inversion":[8],"saturated":[9],"MOSFETs":[10],"is":[11,15],"presented.":[12],"The":[13,29],"formed":[16],"by":[17],"connecting":[18],"simple":[19],"2-input":[20],"\"combiner\"":[21],"and":[22,41,68],"\"subtracter\"":[23],"cells":[24],"in":[25],"a":[26,48,56],"novel":[27],"topology.":[28],"proposed":[30,75],"features":[32],"low-voltage":[33],"operation,":[34],"very":[35],"low":[36],"quiescent":[37],"power":[38,66],"consumption,":[39],"high-linearity":[40],"high":[42],"operating":[43],"frequency.":[44],"In":[45],"comparison":[46],"with":[47],"previously":[49],"reported":[50],"circuit,":[52],"simulated":[53],"results":[54],"0.35-mum":[57],"CMOS":[58],"process":[59],"show":[60],"that,":[61],"under":[62],"the":[63,74],"same":[64],"static":[65],"consumption":[67],"supply":[69],"voltage":[70],"level":[71],"of":[72],"1.2-V,":[73],"exhibits":[77],"better":[78],"linearity.":[79]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
