{"id":"https://openalex.org/W2116188957","doi":"https://doi.org/10.1109/ecctd.2007.4529703","title":"Very Low Voltage CMOS Two-stage Amplifier","display_name":"Very Low Voltage CMOS Two-stage Amplifier","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W2116188957","doi":"https://doi.org/10.1109/ecctd.2007.4529703","mag":"2116188957"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2007.4529703","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529703","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070430111","display_name":"Pietro Monsurr\u00f2","orcid":"https://orcid.org/0000-0002-3821-6566"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Pietro Monsurro","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica (DIE), Universit\u00e0 di Roma \u201cLa Sapienza\u201d, Roma, Italy","Dipt. di Ing. Elettron. (DIE), Univ. di Roma La Sapienza, Rome"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica (DIE), Universit\u00e0 di Roma \u201cLa Sapienza\u201d, Roma, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipt. di Ing. Elettron. (DIE), Univ. di Roma La Sapienza, Rome","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Scotti","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica (DIE), Universit\u00e0 di Roma \u201cLa Sapienza\u201d, Roma, Italy","Dipt. di Ing. Elettron. (DIE), Univ. di Roma La Sapienza, Rome"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica (DIE), Universit\u00e0 di Roma \u201cLa Sapienza\u201d, Roma, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipt. di Ing. Elettron. (DIE), Univ. di Roma La Sapienza, Rome","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068452963","display_name":"Alessandro Trifiletti","orcid":"https://orcid.org/0000-0001-6231-4273"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandro Trifiletti","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica (DIE), Universit\u00e0 di Roma \u201cLa Sapienza\u201d, Roma, Italy","Dipt. di Ing. Elettron. (DIE), Univ. di Roma La Sapienza, Rome"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica (DIE), Universit\u00e0 di Roma \u201cLa Sapienza\u201d, Roma, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipt. di Ing. Elettron. (DIE), Univ. di Roma La Sapienza, Rome","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004729135","display_name":"Salvatore Pennisi","orcid":"https://orcid.org/0000-0002-5803-484X"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Pennisi","raw_affiliation_strings":["Dip. di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universit\u00e0 di Catania, Catania, Italy","University of Catania"],"affiliations":[{"raw_affiliation_string":"Dip. di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universit\u00e0 di Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]},{"raw_affiliation_string":"University of Catania","institution_ids":["https://openalex.org/I39063666"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5070430111"],"corresponding_institution_ids":["https://openalex.org/I861853513"],"apc_list":null,"apc_paid":null,"fwci":0.5223,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.70460591,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"743","last_page":"746"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7594281435012817},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.5407434105873108},{"id":"https://openalex.org/keywords/gain\u2013bandwidth-product","display_name":"Gain\u2013bandwidth product","score":0.534451425075531},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5131521821022034},{"id":"https://openalex.org/keywords/differential-gain","display_name":"Differential gain","score":0.4976861774921417},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.48158788681030273},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.480190634727478},{"id":"https://openalex.org/keywords/fully-differential-amplifier","display_name":"Fully differential amplifier","score":0.45628082752227783},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4530884027481079},{"id":"https://openalex.org/keywords/differential","display_name":"Differential (mechanical device)","score":0.44679689407348633},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.4442647695541382},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4197292625904083},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3443857431411743},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2968485355377197},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14673224091529846},{"id":"https://openalex.org/keywords/semiconductor","display_name":"Semiconductor","score":0.06649020314216614}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7594281435012817},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.5407434105873108},{"id":"https://openalex.org/C38566628","wikidata":"https://www.wikidata.org/wiki/Q1634194","display_name":"Gain\u2013bandwidth product","level":5,"score":0.534451425075531},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5131521821022034},{"id":"https://openalex.org/C2780630149","wikidata":"https://www.wikidata.org/wiki/Q5275345","display_name":"Differential gain","level":4,"score":0.4976861774921417},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.48158788681030273},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.480190634727478},{"id":"https://openalex.org/C189184530","wikidata":"https://www.wikidata.org/wiki/Q5508342","display_name":"Fully differential amplifier","level":5,"score":0.45628082752227783},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4530884027481079},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.44679689407348633},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.4442647695541382},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4197292625904083},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3443857431411743},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2968485355377197},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14673224091529846},{"id":"https://openalex.org/C108225325","wikidata":"https://www.wikidata.org/wiki/Q11456","display_name":"Semiconductor","level":2,"score":0.06649020314216614},{"id":"https://openalex.org/C121477167","wikidata":"https://www.wikidata.org/wiki/Q17154002","display_name":"Semiconductor laser theory","level":3,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/ecctd.2007.4529703","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529703","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/358435","is_oa":false,"landing_page_url":"http://hdl.handle.net/11573/358435","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:iris.uniroma1.it:11573/912801","is_oa":false,"landing_page_url":"http://hdl.handle.net/11573/912801","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1489452400","https://openalex.org/W1576972161","https://openalex.org/W2036779818","https://openalex.org/W2080615209","https://openalex.org/W2096668447","https://openalex.org/W2157637127","https://openalex.org/W2160509435"],"related_works":["https://openalex.org/W2888679486","https://openalex.org/W2527366702","https://openalex.org/W2363713303","https://openalex.org/W2365851945","https://openalex.org/W4387100143","https://openalex.org/W2087165206","https://openalex.org/W2389451406","https://openalex.org/W3106125200","https://openalex.org/W2394349332","https://openalex.org/W2144513726"],"abstract_inverted_index":{"A":[0],"minimum-supply":[1],"rail-to-rail":[2],"differential":[3,46],"stage":[4],"architecture":[5],"is":[6,31],"presented.":[7],"It":[8],"exhibits":[9],"easy":[10],"cascading":[11],"features":[12],"and":[13,55],"unlike":[14],"previous":[15],"similar":[16],"solutions":[17],"does":[18],"not":[19],"critically":[20],"affect":[21],"CMRR.":[22],"Starting":[23],"from":[24],"this":[25],"block,":[26],"a":[27,37,43,49,61],"fully-differential":[28],"two-stage":[29],"amplifier":[30],"designed":[32],"using":[33],"0.7-V":[34],"supply":[35],"in":[36],"130-nm":[38],"CMOS":[39],"technology.":[40],"Simulations":[41],"show":[42],"47-dB":[44],"dc":[45],"gain":[47],"with":[48],"gain-bandwidth":[50],"product":[51],"of":[52],"700":[53],"MHz,":[54],"70-dB":[56],"CMRR":[57],"at":[58],"dc,":[59],"under":[60],"total":[62],"nominal":[63],"current":[64],"consumption":[65],"lower":[66],"than":[67],"2":[68],"mA.":[69]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}