{"id":"https://openalex.org/W2160364845","doi":"https://doi.org/10.1109/ecctd.2007.4529591","title":"An FPGA implementation Of 2-D CNN gabor-type filter","display_name":"An FPGA implementation Of 2-D CNN gabor-type filter","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W2160364845","doi":"https://doi.org/10.1109/ecctd.2007.4529591","mag":"2160364845"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2007.4529591","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529591","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083505327","display_name":"Ertu\u011frul Saat\u00e7\u0131","orcid":"https://orcid.org/0000-0001-8839-4865"},"institutions":[{"id":"https://openalex.org/I197185219","display_name":"Istanbul K\u00fclt\u00fcr University","ror":"https://ror.org/05jvrwv37","country_code":"TR","type":"education","lineage":["https://openalex.org/I197185219"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Ertugrul Saatci","raw_affiliation_strings":["Department of Computer Engineering, Istanbul Kultur University, Istanbul, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Istanbul Kultur University, Istanbul, Turkey","institution_ids":["https://openalex.org/I197185219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068314299","display_name":"Evren Cesur","orcid":null},"institutions":[{"id":"https://openalex.org/I4101805","display_name":"Y\u0131ld\u0131z Technical University","ror":"https://ror.org/0547yzj13","country_code":"TR","type":"education","lineage":["https://openalex.org/I4101805"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Evren Cesur","raw_affiliation_strings":["Department of Electronics and Communications Engineering, Yildiz Technical University, Istanbul, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communications Engineering, Yildiz Technical University, Istanbul, Turkey","institution_ids":["https://openalex.org/I4101805"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054083929","display_name":"V. Tav\u015fanoglu","orcid":"https://orcid.org/0000-0001-8590-1518"},"institutions":[{"id":"https://openalex.org/I4101805","display_name":"Y\u0131ld\u0131z Technical University","ror":"https://ror.org/0547yzj13","country_code":"TR","type":"education","lineage":["https://openalex.org/I4101805"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Vedat Tavsanoglu","raw_affiliation_strings":["Department of Electronics and Communications Engineering, Yildiz Technical University, Istanbul, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communications Engineering, Yildiz Technical University, Istanbul, Turkey","institution_ids":["https://openalex.org/I4101805"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063620004","display_name":"\u0130zzet Kale","orcid":"https://orcid.org/0000-0001-5562-6885"},"institutions":[{"id":"https://openalex.org/I94951947","display_name":"University of Westminster","ror":"https://ror.org/04ycpbx82","country_code":"GB","type":"education","lineage":["https://openalex.org/I94951947"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Izzet Kale","raw_affiliation_strings":["Department of Electronic Systems, University of Westminster, London, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Systems, University of Westminster, London, UK","institution_ids":["https://openalex.org/I94951947"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2367,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.48877389,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"280","last_page":"283"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.9290808439254761},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.686525821685791},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6016786098480225},{"id":"https://openalex.org/keywords/dimension","display_name":"Dimension (graph theory)","score":0.5965664982795715},{"id":"https://openalex.org/keywords/gabor-filter","display_name":"Gabor filter","score":0.5811092853546143},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.48810848593711853},{"id":"https://openalex.org/keywords/field","display_name":"Field (mathematics)","score":0.4369143843650818},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43449270725250244},{"id":"https://openalex.org/keywords/type","display_name":"Type (biology)","score":0.43256521224975586},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3868125379085541},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.3151237368583679},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2719818949699402},{"id":"https://openalex.org/keywords/computer-vision","display_name":"Computer vision","score":0.25604283809661865},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1892625391483307}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.9290808439254761},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.686525821685791},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6016786098480225},{"id":"https://openalex.org/C33676613","wikidata":"https://www.wikidata.org/wiki/Q13415176","display_name":"Dimension (graph theory)","level":2,"score":0.5965664982795715},{"id":"https://openalex.org/C2779883129","wikidata":"https://www.wikidata.org/wiki/Q2447890","display_name":"Gabor filter","level":3,"score":0.5811092853546143},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.48810848593711853},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.4369143843650818},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43449270725250244},{"id":"https://openalex.org/C2777299769","wikidata":"https://www.wikidata.org/wiki/Q3707858","display_name":"Type (biology)","level":2,"score":0.43256521224975586},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3868125379085541},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.3151237368583679},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2719818949699402},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.25604283809661865},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1892625391483307},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2007.4529591","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529591","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1517315774","https://openalex.org/W1570173134","https://openalex.org/W2103897397","https://openalex.org/W2149992269","https://openalex.org/W2292208776","https://openalex.org/W7029094750"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W4200391368","https://openalex.org/W2355315220","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2373535795","https://openalex.org/W2082487009","https://openalex.org/W4237139544","https://openalex.org/W3130402546","https://openalex.org/W4383823603"],"abstract_inverted_index":{"A":[0],"field":[1],"programmable":[2],"gate":[3],"array":[4],"(FPGA)":[5],"implementation":[6,14],"of":[7,44],"the":[8,16,26,59],"Gabor-type":[9],"filter":[10],"is":[11,32],"presented.":[12],"The":[13,30],"uses":[15],"forward":[17],"Euler":[18],"approximation":[19],"with":[20,58],"optimal":[21],"step":[22],"size":[23],"to":[24],"solve":[25],"CNN":[27],"cell-state":[28],"equation.":[29],"FPGA":[31],"implemented":[33],"on":[34],"Xilinx":[35],"Spartan":[36],"XC3S400":[37],"device":[38],"using":[39,53],"219":[40],"slices.":[41],"An":[42],"image":[43],"dimension":[45],"60":[46,48],"times":[47],"can":[49],"be":[50],"processed":[51],"without":[52],"any":[54],"external":[55],"RAM":[56],"only":[57],"block":[60],"RAM.":[61]},"counts_by_year":[{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}