{"id":"https://openalex.org/W2132385510","doi":"https://doi.org/10.1109/ecctd.2007.4529579","title":"A two-step dynamic reference A/D converter","display_name":"A two-step dynamic reference A/D converter","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W2132385510","doi":"https://doi.org/10.1109/ecctd.2007.4529579","mag":"2132385510"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2007.4529579","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529579","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057265426","display_name":"Danping Li","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Li Danping","raw_affiliation_strings":["Centre for Integrated Circuits and Systems, School of EEE, Nanyang Technological University, Singapore","Centre for Integrated Circuits & Syst., Nanyang Technol. Univ., Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre for Integrated Circuits and Systems, School of EEE, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Centre for Integrated Circuits & Syst., Nanyang Technol. Univ., Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062730461","display_name":"Liter Siek","orcid":"https://orcid.org/0000-0002-0415-6497"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Siek Liter","raw_affiliation_strings":["Centre for Integrated Circuits and Systems, School of EEE, Nanyang Technological University, Singapore","Centre for Integrated Circuits & Syst., Nanyang Technol. Univ., Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre for Integrated Circuits and Systems, School of EEE, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Centre for Integrated Circuits & Syst., Nanyang Technol. Univ., Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.7477,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.70624049,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"232","last_page":"235"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8155973553657532},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7375389933586121},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6810973882675171},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.5394419431686401},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4879162013530731},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4847857356071472},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4697817862033844},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.4572737514972687},{"id":"https://openalex.org/keywords/compensation","display_name":"Compensation (psychology)","score":0.454159140586853},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.44949787855148315},{"id":"https://openalex.org/keywords/4-bit","display_name":"4-bit","score":0.4178241789340973},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4041624665260315},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38121551275253296},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22238516807556152},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15007126331329346},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.12482637166976929},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10003501176834106}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8155973553657532},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7375389933586121},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6810973882675171},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.5394419431686401},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4879162013530731},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4847857356071472},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4697817862033844},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.4572737514972687},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.454159140586853},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.44949787855148315},{"id":"https://openalex.org/C194986542","wikidata":"https://www.wikidata.org/wiki/Q229932","display_name":"4-bit","level":3,"score":0.4178241789340973},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4041624665260315},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38121551275253296},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22238516807556152},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15007126331329346},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.12482637166976929},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10003501176834106},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C11171543","wikidata":"https://www.wikidata.org/wiki/Q41630","display_name":"Psychoanalysis","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2007.4529579","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2007.4529579","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 18th European Conference on Circuit Theory and Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1542991855","https://openalex.org/W1550170481","https://openalex.org/W2137097428","https://openalex.org/W2147881255","https://openalex.org/W2157444800","https://openalex.org/W2159348662"],"related_works":["https://openalex.org/W2136440001","https://openalex.org/W2135250276","https://openalex.org/W1965493748","https://openalex.org/W3093575925","https://openalex.org/W2122001378","https://openalex.org/W1951127657","https://openalex.org/W1901843583","https://openalex.org/W3214591077","https://openalex.org/W2142867187","https://openalex.org/W1963652097"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,17],"novel":[4],"8-bit":[5],"100MS/s":[6],"two-step":[7],"dynamic":[8],"reference":[9,23],"analog-to-digital":[10],"(A/D)":[11],"converter":[12],"architecture":[13],"is":[14,24,48],"proposed.":[15],"Using":[16],"binary":[18],"search":[19],"algorithm,":[20],"each":[21],"voltage":[22],"dynamically":[25],"controlled":[26],"by":[27],"all":[28],"previous":[29],"output":[30],"bits.":[31],"The":[32],"offset-compensation":[33],"and":[34,70],"the":[35,44,49,52,61],"pipelining":[36],"techniques":[37],"are":[38],"employed":[39],"to":[40],"enhance":[41],"performance.":[42],"Since":[43],"number":[45],"of":[46,55],"comparators":[47],"same":[50],"as":[51],"intended":[53],"bits":[54],"resolution,":[56],"which":[57],"ensures":[58],"hardware":[59],"simplicity,":[60],"proposed":[62],"design":[63],"can":[64],"potentially":[65],"achieve":[66],"smaller":[67],"chip":[68],"area":[69],"lower":[71],"power":[72],"consumption":[73],"than":[74],"conventional":[75],"high-speed":[76],"ADC":[77],"topologies.":[78]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
