{"id":"https://openalex.org/W1580529978","doi":"https://doi.org/10.1109/ecctd.2005.1523159","title":"Power reduction of ASIPs by distributing the workload on several ASIP-instances","display_name":"Power reduction of ASIPs by distributing the workload on several ASIP-instances","publication_year":2006,"publication_date":"2006-10-11","ids":{"openalex":"https://openalex.org/W1580529978","doi":"https://doi.org/10.1109/ecctd.2005.1523159","mag":"1580529978"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2005.1523159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1523159","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109359140","display_name":"V. Kalyanaraman","orcid":null},"institutions":[{"id":"https://openalex.org/I166433441","display_name":"Hochschule Bremen","ror":"https://ror.org/04f7jc139","country_code":"DE","type":"education","lineage":["https://openalex.org/I166433441"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"V. Kalyanaraman","raw_affiliation_strings":["Hochschule Bremen, Institute of Information and Automation, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hochschule Bremen, Institute of Information and Automation, Germany","institution_ids":["https://openalex.org/I166433441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111393546","display_name":"M. Mueller","orcid":null},"institutions":[{"id":"https://openalex.org/I166433441","display_name":"Hochschule Bremen","ror":"https://ror.org/04f7jc139","country_code":"DE","type":"education","lineage":["https://openalex.org/I166433441"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Mueller","raw_affiliation_strings":["Hochschule Bremen, Institute of Information and Automation, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hochschule Bremen, Institute of Information and Automation, Germany","institution_ids":["https://openalex.org/I166433441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102956698","display_name":"S. Sim\u00f3n","orcid":"https://orcid.org/0009-0001-5325-355X"},"institutions":[{"id":"https://openalex.org/I166433441","display_name":"Hochschule Bremen","ror":"https://ror.org/04f7jc139","country_code":"DE","type":"education","lineage":["https://openalex.org/I166433441"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"S. Simon","raw_affiliation_strings":["Hochschule Bremen, Institute of Information and Automation, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hochschule Bremen, Institute of Information and Automation, Germany","institution_ids":["https://openalex.org/I166433441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001497995","display_name":"M. Steinert","orcid":"https://orcid.org/0009-0004-6658-5352"},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Steinert","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025945796","display_name":"H. Gryska","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"H. Gryska","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2846,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53107517,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"457","last_page":"460"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8304505348205566},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.6949582695960999},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.56137615442276},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5514243841171265},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5316119194030762},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5249887704849243},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.5179578065872192},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5179347395896912},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4938850998878479},{"id":"https://openalex.org/keywords/application-specific-instruction-set-processor","display_name":"Application-specific instruction-set processor","score":0.48283132910728455},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4756726324558258},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4723447561264038},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.45650842785835266},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.44043752551078796},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.4250173568725586},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4148215353488922},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14654764533042908},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08206021785736084},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.07071813941001892}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8304505348205566},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.6949582695960999},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.56137615442276},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5514243841171265},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5316119194030762},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5249887704849243},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.5179578065872192},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5179347395896912},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4938850998878479},{"id":"https://openalex.org/C201736964","wikidata":"https://www.wikidata.org/wiki/Q621583","display_name":"Application-specific instruction-set processor","level":3,"score":0.48283132910728455},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4756726324558258},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4723447561264038},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.45650842785835266},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.44043752551078796},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.4250173568725586},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4148215353488922},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14654764533042908},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08206021785736084},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.07071813941001892},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2005.1523159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1523159","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1481646516","https://openalex.org/W1493602245","https://openalex.org/W1525615331","https://openalex.org/W2002533296","https://openalex.org/W2132324656","https://openalex.org/W3146473537"],"related_works":["https://openalex.org/W2047885859","https://openalex.org/W2036206036","https://openalex.org/W2189543321","https://openalex.org/W2551798393","https://openalex.org/W3002622661","https://openalex.org/W2031976241","https://openalex.org/W2539200741","https://openalex.org/W1980898636","https://openalex.org/W2883183116","https://openalex.org/W1988987900"],"abstract_inverted_index":{"In":[0,45,82],"modern":[1],"SoC":[2],"designs,":[3],"more":[4,6,106],"and":[5,29],"application":[7],"specific":[8],"instruction-set":[9],"processors":[10],"(ASIPs)":[11],"are":[12],"used.":[13],"They":[14],"enable":[15],"a":[16,73,102],"trade":[17],"off":[18],"between":[19],"the":[20,24,34,43,52,61,70,94,112],"flexibility":[21],"due":[22],"to":[23,42],"software":[25,62],"implementation":[26],"of":[27,72,91,96,99],"algorithms":[28],"hardware":[30],"efficiency":[31],"arising":[32],"from":[33],"ASIP":[35,67,75],"architecture":[36],"which":[37,104],"is":[38,49,85,101],"optimized":[39],"with":[40],"respect":[41],"application.":[44],"this":[46],"paper,":[47],"it":[48,84],"shown":[50,86],"that":[51,87],"total":[53],"power":[54,89,109],"dissipation":[55],"could":[56],"be":[57,77],"reduced":[58],"by":[59],"distributing":[60],"tasks":[63],"on":[64],"several":[65],"identical":[66],"instances":[68],"although":[69],"throughput":[71],"single":[74],"would":[76],"sufficient":[78],"for":[79,88],"all":[80],"tasks.":[81],"addition,":[83],"comparisons":[90,110],"processor":[92],"instances,":[93],"number":[95],"executed":[97],"lines":[98],"code":[100],"parameter":[103],"gives":[105],"insight":[107],"into":[108],"than":[111],"clock":[113],"rate.":[114]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}