{"id":"https://openalex.org/W1583998855","doi":"https://doi.org/10.1109/ecctd.2005.1523152","title":"Impact of process parameter variations on the energy dissipation in adiabatic logic","display_name":"Impact of process parameter variations on the energy dissipation in adiabatic logic","publication_year":2006,"publication_date":"2006-10-11","ids":{"openalex":"https://openalex.org/W1583998855","doi":"https://doi.org/10.1109/ecctd.2005.1523152","mag":"1583998855"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2005.1523152","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1523152","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026323518","display_name":"J. Fischer","orcid":"https://orcid.org/0000-0002-6789-6062"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"J. Fischer","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007303066","display_name":"E. Amirante","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"E. Amirante","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111462200","display_name":"T. Nirschl","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"T. Nirschl","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040915824","display_name":"Philip Teichmann","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"P. Teichmann","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111472507","display_name":"Stephan Henzler","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Henzler","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034576088","display_name":"D. Schmitt\u2010Landsiedel","orcid":"https://orcid.org/0000-0002-4817-5139"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Schmitt-Landsiedel","raw_affiliation_strings":["Institute for Technical Electronics, Technical University Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Technical Electronics, Technical University Munich, Munich, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5026323518"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.04480148,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"3","issue":null,"first_page":"429","last_page":"432"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adiabatic-circuit","display_name":"Adiabatic circuit","score":0.8750841617584229},{"id":"https://openalex.org/keywords/adiabatic-process","display_name":"Adiabatic process","score":0.8215173482894897},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.8057016134262085},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7583001852035522},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.5882999897003174},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5777534246444702},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5580958127975464},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4019147455692291},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2679194509983063},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26453977823257446},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.2505573034286499},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24471378326416016},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.18471911549568176},{"id":"https://openalex.org/keywords/thermodynamics","display_name":"Thermodynamics","score":0.06251364946365356}],"concepts":[{"id":"https://openalex.org/C87606752","wikidata":"https://www.wikidata.org/wiki/Q4682637","display_name":"Adiabatic circuit","level":5,"score":0.8750841617584229},{"id":"https://openalex.org/C109663097","wikidata":"https://www.wikidata.org/wiki/Q182453","display_name":"Adiabatic process","level":2,"score":0.8215173482894897},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.8057016134262085},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7583001852035522},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5882999897003174},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5777534246444702},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5580958127975464},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4019147455692291},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2679194509983063},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26453977823257446},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2505573034286499},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24471378326416016},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.18471911549568176},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.06251364946365356},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2005.1523152","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1523152","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W41482027","https://openalex.org/W1556126470","https://openalex.org/W2045383911","https://openalex.org/W2050873467","https://openalex.org/W2122984966"],"related_works":["https://openalex.org/W2121481186","https://openalex.org/W2389800961","https://openalex.org/W2390275299","https://openalex.org/W2354955446","https://openalex.org/W2364223523","https://openalex.org/W4247821566","https://openalex.org/W2158727005","https://openalex.org/W1543526270","https://openalex.org/W2886813482","https://openalex.org/W2350477494"],"abstract_inverted_index":{"Adiabatic":[0],"logic":[1],"offers":[2],"high":[3],"energy":[4,65,79,94],"savings":[5,95],"compared":[6],"to":[7,97],"standard":[8],"CMOS":[9,54],"at":[10],"moderate":[11],"operating":[12],"speeds.":[13],"Until":[14],"now,":[15],"only":[16],"rudimentary":[17],"investigations":[18],"of":[19,22,34,43,48,58,81,85,100],"the":[20,32,35,56,59,64,78,82,89],"robustness":[21],"adiabatic":[23,86],"circuits":[24],"were":[25],"presented.":[26],"However,":[27],"in":[28,51],"deep":[29],"sub-micron":[30],"technologies":[31],"deviation":[33],"device":[36],"parameters":[37],"from":[38],"their":[39],"nominal":[40],"value":[41],"is":[42,67],"crucial":[44],"importance.":[45],"By":[46],"means":[47],"Monte-Carlo":[49],"simulations":[50],"a":[52,98],"130nm":[53],"technology,":[55],"impact":[57],"process":[60],"parameter":[61],"variations":[62,74],"on":[63],"dissipation":[66,80],"derived,":[68],"where":[69],"both":[70],"global":[71],"and":[72],"local":[73],"are":[75,102],"considered.":[76],"Comparing":[77],"97.7%":[83],"percentiles":[84],"families":[87],"with":[88],"ones":[90],"for":[91],"static":[92],"CMOS,":[93],"up":[96],"factor":[99],"10":[101],"observed.":[103]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-01T08:55:55.761014","created_date":"2025-10-10T00:00:00"}
