{"id":"https://openalex.org/W1608532017","doi":"https://doi.org/10.1109/ecctd.2005.1523112","title":"Versatile architectures for decoding a class of LDPC codes","display_name":"Versatile architectures for decoding a class of LDPC codes","publication_year":2006,"publication_date":"2006-10-11","ids":{"openalex":"https://openalex.org/W1608532017","doi":"https://doi.org/10.1109/ecctd.2005.1523112","mag":"1608532017"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2005.1523112","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1523112","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069906675","display_name":"Andrew W. Byrne","orcid":"https://orcid.org/0000-0003-0296-4586"},"institutions":[{"id":"https://openalex.org/I27577105","display_name":"University College Cork","ror":"https://ror.org/03265fv13","country_code":"IE","type":"education","lineage":["https://openalex.org/I27577105"]}],"countries":["IE"],"is_corresponding":true,"raw_author_name":"A. Byrne","raw_affiliation_strings":["Department of Microelectronic Engineering, University College Cork, Ireland","Dept. of Microelectron. Eng., Univ. Coll. Cork, , Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronic Engineering, University College Cork, Ireland","institution_ids":["https://openalex.org/I27577105"]},{"raw_affiliation_string":"Dept. of Microelectron. Eng., Univ. Coll. Cork, , Ireland","institution_ids":["https://openalex.org/I27577105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016443261","display_name":"Emanuel Popovici","orcid":"https://orcid.org/0000-0001-6813-5030"},"institutions":[{"id":"https://openalex.org/I27577105","display_name":"University College Cork","ror":"https://ror.org/03265fv13","country_code":"IE","type":"education","lineage":["https://openalex.org/I27577105"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"E.M. Popovici","raw_affiliation_strings":["Department of Microelectronic Engineering, University College Cork, Ireland","Dept. of Microelectron. Eng., Univ. Coll. Cork, , Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronic Engineering, University College Cork, Ireland","institution_ids":["https://openalex.org/I27577105"]},{"raw_affiliation_string":"Dept. of Microelectron. Eng., Univ. Coll. Cork, , Ireland","institution_ids":["https://openalex.org/I27577105"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017124468","display_name":"Michael E. O\u2019Sullivan","orcid":"https://orcid.org/0000-0002-2735-2407"},"institutions":[{"id":"https://openalex.org/I27577105","display_name":"University College Cork","ror":"https://ror.org/03265fv13","country_code":"IE","type":"education","lineage":["https://openalex.org/I27577105"]},{"id":"https://openalex.org/I26538001","display_name":"San Diego State University","ror":"https://ror.org/0264fdx42","country_code":"US","type":"education","lineage":["https://openalex.org/I26538001"]}],"countries":["IE","US"],"is_corresponding":false,"raw_author_name":"M. O'Sullivan","raw_affiliation_strings":["Department of Mathematics and Statistics, San Diego State University, San Diego, CA, USA","Dept. of Microelectron. Eng., Univ. Coll. Cork, , Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Mathematics and Statistics, San Diego State University, San Diego, CA, USA","institution_ids":["https://openalex.org/I26538001"]},{"raw_affiliation_string":"Dept. of Microelectron. Eng., Univ. Coll. Cork, , Ireland","institution_ids":["https://openalex.org/I27577105"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5069906675"],"corresponding_institution_ids":["https://openalex.org/I27577105"],"apc_list":null,"apc_paid":null,"fwci":0.3018,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.60466824,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"269","last_page":"272"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10796","display_name":"Cooperative Communication and Network Coding","score":0.9797999858856201,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7735536694526672},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.7521141171455383},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.704140841960907},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.5419244766235352},{"id":"https://openalex.org/keywords/serial-concatenated-convolutional-codes","display_name":"Serial concatenated convolutional codes","score":0.4864892363548279},{"id":"https://openalex.org/keywords/concatenated-error-correction-code","display_name":"Concatenated error correction code","score":0.4695105254650116},{"id":"https://openalex.org/keywords/forward-error-correction","display_name":"Forward error correction","score":0.4430426359176636},{"id":"https://openalex.org/keywords/list-decoding","display_name":"List decoding","score":0.4186941385269165},{"id":"https://openalex.org/keywords/block-code","display_name":"Block code","score":0.32879412174224854},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3231040835380554},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2655552327632904},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09831574559211731}],"concepts":[{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7735536694526672},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.7521141171455383},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.704140841960907},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.5419244766235352},{"id":"https://openalex.org/C33529081","wikidata":"https://www.wikidata.org/wiki/Q18378194","display_name":"Serial concatenated convolutional codes","level":5,"score":0.4864892363548279},{"id":"https://openalex.org/C78944582","wikidata":"https://www.wikidata.org/wiki/Q5158264","display_name":"Concatenated error correction code","level":4,"score":0.4695105254650116},{"id":"https://openalex.org/C202932441","wikidata":"https://www.wikidata.org/wiki/Q55611017","display_name":"Forward error correction","level":3,"score":0.4430426359176636},{"id":"https://openalex.org/C204397858","wikidata":"https://www.wikidata.org/wiki/Q4437907","display_name":"List decoding","level":5,"score":0.4186941385269165},{"id":"https://openalex.org/C157125643","wikidata":"https://www.wikidata.org/wiki/Q884707","display_name":"Block code","level":3,"score":0.32879412174224854},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3231040835380554},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2655552327632904},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09831574559211731}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecctd.2005.1523112","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1523112","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W152471750","https://openalex.org/W1572884776","https://openalex.org/W1589135268","https://openalex.org/W1608679777","https://openalex.org/W1628002864","https://openalex.org/W1973712217","https://openalex.org/W1995875735","https://openalex.org/W2117815112","https://openalex.org/W2122703296","https://openalex.org/W2128037788","https://openalex.org/W2128765501","https://openalex.org/W2138998946","https://openalex.org/W2142496091","https://openalex.org/W4285719527","https://openalex.org/W6606175091","https://openalex.org/W6634387629","https://openalex.org/W6635191971","https://openalex.org/W6681141845"],"related_works":["https://openalex.org/W2139745099","https://openalex.org/W2485298482","https://openalex.org/W1782566311","https://openalex.org/W2135838798","https://openalex.org/W2126543779","https://openalex.org/W2169710030","https://openalex.org/W2121777163","https://openalex.org/W1504657239","https://openalex.org/W99853930","https://openalex.org/W2010879611"],"abstract_inverted_index":{"This":[0,44],"paper":[1],"presents":[2],"a":[3,47],"construction":[4,66,88],"for":[5,25,67],"low":[6,68],"and":[7,17,63,77],"high":[8],"rate":[9,71],"Low-Density":[10],"Parity":[11],"Check":[12],"(LDPC)":[13],"codes,":[14],"their":[15],"performance":[16],"efficient":[18],"hardware":[19],"implementation.":[20,55],"The":[21],"problem":[22],"with":[23,51],"decoding":[24,94],"LDPC":[26,72,93],"codes":[27],"is":[28,89,96],"the":[29,36,39],"linear":[30],"increase":[31],"in":[32,46],"resource":[33],"requirements":[34],"as":[35],"size":[37,62],"of":[38,49,83,86],"parity":[40],"check":[41],"matrix":[42],"increases.":[43],"results":[45],"number":[48],"issues":[50,57],"regard":[52],"to":[53],"practical":[54],"These":[56],"include":[58],"interconnect":[59],"routing,":[60],"memory":[61],"parallelism.":[64],"A":[65,91],"complexity,":[69],"variable":[70],"code":[73],"will":[74],"be":[75],"introduced":[76],"an":[78],"architecture":[79,95],"that":[80],"takes":[81],"advantage":[82],"certain":[84],"properties":[85],"this":[87],"proposed.":[90],"versatile":[92],"then":[97],"evaluated":[98],"on":[99],"FPGA.":[100]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}